4 hardware cryptographic api performance – Intel AS/400 RISC Server User Manual

Page 145

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background image

Notes:
y

Transaction Length set at 1024 bytes

y

See section 8.2 for Test Environment Information

35

163

2048

10

SHA-1 / RSA

30

129

2048

1

SHA-1 / RSA

240

1,155

1024

10

SHA-1 / RSA

197

901

1024

1

SHA-1 / RSA

JCE

(Transactions/Second)

i5/OS

(Transactions/Second)

RSA Key Length

(Bits)

Threads

Encryption

Algorithm

Signing Performance

Table 8.2

Notes:
y

Key Length set at 1024 bits

y

Transaction Length set at 16384 bytes

y

See section 8.2 for Test Environment Information

78,659,561

4,801

132,059,807

8,060

10

SHA-512

69,098,731

4,217

115,201,800

7,031

1

SHA-512

75,925,668

4,634

132,301,878

8,075

10

SHA-384

65,865,327

4,020

115,505,548

7,050

1

SHA-384

39,184,923

2,392

73,086,411

4,461

10

SHA-256

33,576,523

2,049

63,645,228

3,885

1

SHA-256

48,401,773

2,954

178,172,751

10,875

10

SHA-1

37,608,172

2,295

110,642,896

6,753

1

SHA-1

JCE

(Bytes/Second)

JCE

(Transactions/

Second)

i5/OS

(Bytes/ Second)

i5/OS

(Transactions/

Second)

Threads

Encryption

Algorithm

Digest Performance

Table 8.3

8.4 Hardware Cryptographic API Performance

This section provides information on the hardware based cryptographic offload solution IBM 4764
PCI-X Cryptography Coprocessor (Feature Code 4806)
. This solution will improve the system CPU
capacity by offloading CPU demanding cryptographic functions.

IBM System i5

Platform Support

No IOP Required

Required Hardware

Secure hardware module

Cryptographic Key Protection

Secure accelerator (SSL)

Banking/finance (B/F)

Applications

#4806

System i hardware feature code

IBM 4764 PCI-X Cryptographic Coprocessor

IBM Common Name

The 4764 Cryptographic Coprocessor provides both cryptographic coprocessor and secure-key
cryptographic accelerator functions in a single PCI-X card. The coprocessor functions are targeted to
banking and finance applications. The secure-key accelerator functions are targeted to improving the
performance of SSL (secure socket layer) and TLS (transport layer security) based transactions. The 4764
Cryptographic Coprocessor supports secure storage of cryptographic keys in a tamper-resistant module,

IBM i 6.1 Performance Capabilities Reference - January/April/October 2008

©

Copyright IBM Corp. 2008

Chapter 8 Cryptography Performance

145

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