NXP Semiconductors PCA9665 - Manual

1. General description
The PCA9665 serves as an interface between most standard parallel-bus
microcontrollers/microprocessors and the serial I
2 C-bus and allows the parallel bus
system to communicate bidirectionally with the I 2 C-bus. The PCA9665 can operate as a
master or a slave and can be a transmitter or receiver. Communication with the I 2 C-bus is
carried out on a Byte or Buffered mode using interrupt or polled handshake. The
PCA9665 controls all the I
2 C-bus specific sequences, protocol, arbitration and timing with
no external timing element required.
The PCA9665 has the same footprint as the PCA9564 with additional features:
• 1 MHz transmission speeds
• Up to 25 mA drive capability on SCL/SDA
• 68-byte buffer
• I 2 C-bus General Call
• Software reset on the parallel bus
2. Features
■ Parallel-bus to I 2 C-bus protocol converter and interface
■ Both master and slave functions
■ Multi-master capability
■ Internal oscillator trimmed to 15 % accuracy reduces external components
■ 1 Mbit/s and up to 25 mA SCL/SDA I
OL
(Fast-mode Plus (Fm+)) capability
■ I 2 C-bus General Call capability
■ Software reset on parallel bus
■ 68-byte data buffer
■ Operating supply voltage: 2.3 V to 3.6 V
■ 5 V tolerant I/Os
■ Standard-mode and Fast-mode I 2 C-bus capable and compatible with SMBus
■ ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
■ Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
■ Packages offered: DIP20, SO20, TSSOP20, HVQFN20
PCA9665
Fm+ parallel bus to I 2 C-bus controller
Rev. 02 — 7 December 2006 Product data sheet