AMD Geode LX 800@0.9W - Manual (Page 421)

AMD Geode™ LX Processors Data Book 421
Video Processor Register Descriptions 33234H
6.8.3 Video Processor Module Control/Configuration Registers
6.8.3.1 Video Configuration (VCFG)
VP Memory Offset 000h
Type
R/W
Reset Value 00000000_00000000h
VCFG Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD
EN_
420
BIT_8
_LINE_SIZE
BIT_9
_LINE_SIZE
SP
INIT_R
D_LN_SIZ
E
INIT_RD_ADDR VID_LIN_SIZ
SP
SC_BYP
RSVD
VID_FMT
RSVD
VID
_
EN
VCFG Bit Descriptions
Bit Name Description
63:29 RSVD (RO) Reserved (Read Only). Reads back as 0.
28 EN_420 Enable 4:2:0 Format.
0: Disable.
1: Enable.
Note: When the input video stream is RGB, this bit must be set to 0.
27 BIT_8_
LINE_SIZE Bit 8 Line Size. When enabled, this bit increases line size from VID_LIN_SIZ (bits [15:8])
DWORDs by adding 256 DWORDs.
0: Disable.
1: Enable.
26 BIT_9_
LINE_SIZE Bit 9 Line Size. When enabled, this bit increases line size from {BIT_8_LINE_SIZE,
VID_LIN_SIZ (bits [15:8])} DWORDs by adding 512 DWORDs.
0: Disable.
1: Enable.
25 SP Spare. Bit is R/W but has no function.
24 INIT_RD_
LN_SIZE Increase Initial Buffer Read Address. Increases INIT_RD_ADDR (bits [23:16]) by add-
ing 256 DWORDs to the initial buffer address. (Effectively INIT_RD_ADDR becomes 9
bits (bits [24:16]) of address to the line buffers. Each line buffer location contains 4 pixels.
Therefore INIT_RD_ADDR is restricted to 4 pixel resolution.)
If sub-4 pixel start is desired, use the VP Memory Offset 010h[11:0].
0: Disable.
1: Enable.
23:16 INIT_RD_ADDR Initial Buffer Read Address. This field preloads the starting read address for the line
buffers at the beginning of each display line. It is used for hardware clipping of the video
window at the left edge of the active display. Since each line buffer contains 4 pixels,
INIT_RD_ADDR is restricted to 4 pixel resolution.
For an unclipped window, this value should be 0. For 420 mode, set bits [17:16] to 00.
15:8 VID_LIN_SIZ Video Line Size (in DWORDs). Represents the number of DWORDs that make up the
horizontal size of the source video data.
7:6 SP Spares. Bits are R/W but have not function.