2 vip block descriptions, Figure 6-39, Vip block diagram – AMD Geode LX [email protected] User Manual

Page 463

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AMD Geode™ LX Processors Data Book

463

Video Input Port

33234H

6.9.2

VIP Block Descriptions

Figure 6-39. VIP Block Diagram

8/16

Address

address

Formatter

Generator

Memory

Registers

VIP Data

VIP Clock

VIP Clock Control

GLIU Clock

GLIU Clock Control

VIPCLK

GLIU_CLK

Input

Control

QWORD = 64 bits

take

req

reg write

reg read

Mapped

GLIU

Interface

Clock Control

Input

Output

Control

Dual Port

input ctl

output ctl

16 bits

Capture RAM

VIP INT

SYNC_TO_PIN

SYNC_TO_VG

(256x64)

VIDEO_OK

FIELD_TO_VG

VIPSYNC

VIP VSYNC

VIP HSYNC

VIP

Clock

GLIU

Clock

MSR

Registers

GLIU
Write

Master

GLIU

Slave

GLIU

Planar mode: 512 byte(64 QWORDs) YUV, Ancillary FIFO
Linear mode: 1536 byte(192 QWORDs) Video, 256 (64 QWORDs) byte Ancillary FIFO

VIP Register

Block

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