8 rsts - restore task register and descriptor, 9 setalc - set al to cf – AMD Geode LX [email protected] User Manual

Page 653

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AMD Geode™ LX Processors Data Book

653

Instruction Set

33234H

Notes

The RSM instruction does not check the values that it reads from the SMM header for validity.

The RSM instruction set the current privilege level to the SS DPL value read from the SMM header.

If a RSM restores the processor to real mode, the VM bit of the EFlags register is cleared regardless of the state of the VM
bit in the EFlags value of the SMM header.

If RSM restores the processor to a privilege level that is not 3, then the VM bit of the EFlags register is cleared, regardless
of the contents of the VM bit in the EFlags value of the SMM header.

8.3.4.8

RSTS - Restore Task Register and Descriptor

Operation

Description

Restore the Task register and descriptor from memory. Below is the format of the descriptor contents in memory.

Flags Affected

None.

Exceptions

#UD

If current privilege level is not 0, or the SMM_INST_EN = 0 and if the processor is not in SMM and if the processor

is not in DMM.

Notes

The reg field within the mod r/m byte must be zero for the RSTS instruction to be recognized.

The RSTS instruction does not check its memory operand for validity. Care should be taken to always load valid data into
the TS.

8.3.4.9

SETALC - Set AL to CF

Operation

AL <= {8{CF}};

Description

IF the EFlags CF is set, then the SETALC instruction sets AL to FFh. Otherwise, SETALC sets AL to FFh.

Flags Affected

None.

Opcode

Instruction

Clocks

Description

0F 7D

RSTS m80

12

Restore TS from memory

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

0

SELECTOR[15:3]

TI

RPL

+8

BASE[31:24]

G

B

0

V

LIMIT[19:16]

1

DPL

1

0

E

W

A

BASE[23:16]

+4

BASE[15:0]

LIMIT[15:0]

+0

Opcode

Instruction

Clocks

Description

d6

SETALC

2

Set AL according to CF.

IF (CPL<>0 OR (SMM_INST_EN=0 AND SMM=0 AND DMM=0))

#UD;

ELSE

TS.DESCR <= MEM80;

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