3 application register set, Application register set, Table 5-2 – AMD Geode LX [email protected] User Manual

Page 91

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AMD Geode™ LX Processors Data Book

91

CPU Core

33234H

5.3

Application Register Set

The Application Register Set consists of the registers most
often used by the applications programmer. These regis-
ters are generally accessible, although some bits in the
EFLAGS registers are protected.

The General Purpose register contents are frequently
modified by instructions and typically contain arithmetic
and logical instruction operands.

In real mode, Segment registers contain the base
address for each segment. In protected mode, the Seg-
ment registers contain segment selectors. The segment
selectors provide indexing for tables (located in memory)

that contain the base address for each segment, as well as
other memory addressing information.

The Instruction Pointer register points to the next instruc-
tion that the processor will execute. This register is auto-
matically incremented by the processor as execution
progresses.

The EFLAGS register contains control bits used to reflect
the status of previously executed instructions. This register
also contains control bits that affect the operation of some
instructions.

Table 5-2. Application Register Set

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9

8

7

6

5

4

3

2

1

0

General Purpose Registers

AX

AH

AL

EAX (Extended A Register)

BX

BH

BL

EBX (Extended B Register)

CX

CH

CL

ECX (Extended C Register)

DX

DH

DL

EDX (Extended D Register)

SI (Source Index)

ESI (Extended Source Index)

DI (Destination Index)

EDI (Extended Destination Index)

BP (Base Pointer)

EBP (Extended Base Pointer)

SP (Stack Pointer)

ESP (Extended Stack Pointer)

Segment (Selector) Registers

CS (Code Segment)

SS (Stack Segment)

DS (D Data Segment)

ES (E Data Segment)

FS (F Data Segment)

GS (G Data Segment)

Instruction Pointer and EFLAGS Registers

EIP (Extended Instruction Pointer)

ESP (Extended EFLAGS Register)

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