Altera Unique Chip ID - Manual

Altera Unique Chip ID IP Core User Guide
2014.09.02
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The Altera Unique Chip ID (ALTCHIP_ID) IP core allows you to uniquely identify the target FPGA before
device programming. This protects your device from receiving unauthorized programming data. Use the
IP Catalog and parameter editor to customize and generate the ALTCHIP_ID IP core.
The chip ID block has a 64 bit unique ID per die. The unique chip ID is read out from a 90 bit circular shift
register by a three pin serial interface. The initial 64 bits contain the unique ID value. The last 26 bits are a
concatenation of various fuse bits set during the manufacturing flow; these bits have Altera reserved values.
The Unique Chip ID register is implemented as a barrel shift register. For more information about customizing
IP cores.
This IP core is not supported for Arria 10 designs. Note:
Related Information
• Introduction to Altera IP Cores
• Altera IP Release Notes
Functional Description
At the initial state, the
data_valid
signal is low because no data is read from the chip ID block. After feeding
a clock signal to the clkin input port, the ALTCHIP_ID IP core begins to acquire the unique chip ID via
the chip ID block. After acquiring the unique chip ID, the IP core asserts the
data_valid
signal to indicate
that the unique chip ID value at the output port is ready for retrieval.
The operation repeats only when you provide another clock signal while the data_valid signal is low. If
the
data_valid
signal is high when you provide another clock signal, the operation stops because the
chip_id[63..0] output holds the chip ID.
A minimum of 67 clock cycles are required for the data_valid signal to go high.
The
chip_id [63:0]
output port holds the value of the unique chip ID until you reconfigure the device or
reset the IP core.
Installing and Licensing IP Cores
The Altera IP Library provides many useful IP core functions for production use without purchasing an
additional license. You can evaluate any Altera IP core in simulation and compilation in the Quartus II
software using the OpenCore evaluation feature. Some Altera IP cores, such as MegaCore
®
functions, require
ISO
9001:2008
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