Altera Floating-Point User Manual
Floating-point ip cores user guide
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Table of contents
Document Outline
- Floating-Point IP Cores User Guide
- Contents
- 1. About Floating-Point IP Cores
- List of Floating-Point IP Cores
- Installing and Licensing IP Cores
- Design Flow
- Upgrading IP Cores
- Floating-Point IP Cores General Features
- IEEE-754 Standard for Floating-Point Arithmetic
- Non-IEEE-754 Standard Format
- Floating-Points IP Cores Output Latency
- Floating-Point IP Cores Design Example Files
- VHDL Component Declaration
- VHDL LIBRARY-USE Declaration
- 2. ALTERA_FP_MATRIX_INV IP Core
- ALTERA_FP_MATRIX_INV Features
- ALTERA_FP_MATRIX_INV Output Latency
- ALTERA_FP_MATRIX_INV Resource Utilization and Performance
- ALTERA_FP_MATRIX_INV Functional Description
- ALTERA_FP_MATRIX_INV Design Example: Matrix Inverse of Single-Precision Format Numbers
- Sample Matrix Data
- ALTERA_FP_MATRIX_INV Signals
- ALTERA_FP_MATRIX_INV Parameters
- 3. ALTERA_FP_MATRIX_MULT IP Core
- 4. ALTERA_FP_ACC_CUSTOM IP Core
- 5. ALTFP_ADD_SUB IP Core
- 6. ALTFP_DIV IP Core
- 7. ALTFP_MULT IP Core
- 8. ALTFP_SQRT
- 9. ALTFP_EXP IP Core
- 10. ALTFP_INV IP Core
- 11. ALTFP_INV_SQRT IP Core
- 12. ALTFP_LOG
- 13. ALTFP_ATAN IP Core
- 14. ALTFP_SINCOS IP Core
- 15. ALTFP_ABS IP Core
- 16. ALTFP_COMPARE IP Core
- 17. ALTFP_CONVERT IP Core
- 18. ALTERA_FP_FUNCTIONS IP Core
- A. Document Revision History