Altera Active Serial Memory Interface - Manual

Altera ASMI Parallel IP Core User Guide
2014.12.15
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About This IP Core
The Altera ASMI Parallel IP core provides access to erasable programmable configurable serial (EPCS),
quad-serial configuration (EPCQ), and low-voltage quad-serial configuration (EPCQ-L) devices through
parallel data input and output ports.
An EPCS device is a serial configuration device that you use to perform an active serial (AS) configuration
on supported Altera ® devices.
An EPCQ/EPCQ-L device is a serial or quad-serial configuration that supports AS x1 or AS x4 configura‐
tion scheme. During AS configuration, the Altera device is the master and the EPCS/EPCQ/EPCQ-L
device is the slave.
The Altera ASMI Parallel IP core implements a basic active serial memory interface (ASMI). To use this
IP core, you do not need to know the details of the serial interface and the read and write protocol of an
EPCS/EPCQ/EPCQ-L device.
Note: Beginning from the Quartus
® II software version 14.0, the name of this IP core has been changed
from ALTASMI_PARALLEL to Altera ASMI Parallel IP core.
You can perform the following tasks with the Altera ASMI Parallel IP core:
• Read the EPCS silicon identification (device identification)
• Protect a certain sector in the EPCS/EPCQ/EPCQ-L device from write or erase
• Read the data at a specified address from the EPCS/EPCQ/EPCQ-L device
• Perform single-byte write to the EPCS/EPCQ/EPCQ-L device
• Perform page write to the EPCS/EPCQ/EPCQ-L device
• Read the status of the EPCS/EPCQ/EPCQ-L device
• Erase a specified sector on the EPCS/EPCQ/EPCQ-L device
• Erase a specified die on the EPCQ-L512 and EPCQ-L1024
• Erase memory in bulk on the EPCS/EPCQ/EPCQ-L256/EPCQ-L512 device
The memory in the EPCS/EPCQ/EPCQ-L device contains two sections:
• Configuration memory—contains the bitstream of the configuration data
• General purpose memory—used for an application-specific storage
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