Document Outline

• MITX-CORE-820
• Contents
• About this Manual
  • Overview of Contents
  • Abbreviations
  • Conventions
  • Summary of Changes
• Safety Notes
• Sicherheitshinweise
• Introduction
  • 1.1 Overview
  • 1.2 Features
  • 1.3 Standard Compliances
  • 1.4 Mechanical Specifications
  • 1.5 Board Identification
  • 1.6 Ordering Information
• Hardware Preparation and Installation
  • 2.1 Environmental and Power Requirements
    • 2.1.1 Environmental Requirements
    • 2.1.2 Power Requirements
    • 2.1.3 Power Dissipation
  • 2.2 Unpacking and Inspecting the Board
  • 2.3 Preparing the Installation Environment
  • 2.4 Memory Module Installation
  • 2.5 Processor Cooler Installation
• Controls, LEDs and Connectors
  • 3.1 Board Layout
  • 3.2 Connector Definitions
  • 3.3 LED Controls
  • 3.4 Rear I/O Connectors
• Functional Description
  • 4.1 Block Diagram
  • 4.2 Processor
  • 4.3 Motherboard Clock Diagram
  • 4.4 Chipset
  • 4.5 System Memory
  • 4.6 Video
    • 4.6.1 LVDS
    • 4.6.2 VGA
    • 4.6.3 Display Port
    • 4.6.4 Embedded Display Port (eDP)
  • 4.7 PCI Express
  • 4.8 LAN on Motherboard
  • 4.9 WiFi/WiMax
  • 4.10 Storage
  • 4.11 USB 2.0
  • 4.12 Power Supplies
    • 4.12.1 Power Consumption
    • 4.12.2 Power Sequencing Requirements
    • 4.12.3 Power Management
    • 4.12.4 Power Measurement
  • 4.13 Embedded Controller
    • 4.13.1 Voltage Monitor
    • 4.13.2 Serial Port
    • 4.13.3 Fan Header
    • 4.13.4 PS/2
    • 4.13.5 Debug Header
    • 4.13.6 Charge Board Interface
  • 4.14 SMBUS Architecture
  • 4.15 Audio
  • 4.16 Watchdog Timer
  • 4.17 RTC Circuit
    • 4.17.1 Boot Block
  • 4.18 SPI Flash
  • 4.19 Front Panel Header
  • 4.20 TPM/Port 80 Interface
  • 4.21 On Board LED Interface
  • 4.22 Case Open Header
  • 4.23 Internal Graphics Disable
  • 4.24 User GPIO Header
  • 4.25 Debug Support
  • 4.26 Wake Events
  • 4.27 Manageability
• BIOS
  • 5.1 Power Up Self Test (POST)
  • 5.2 Boot Process
  • 5.3 Initiating Setup
  • 5.4 Setup Utility
    • 5.4.1 Main Menu
      • 5.4.1.1 System Information
      • 5.4.1.2 Boot Features
    • 5.4.2 Advanced Menu
      • 5.4.2.1 Boot Configuration
      • 5.4.2.2 Processor Configuration
      • 5.4.2.3 Processor Power Management
      • 5.4.2.4 Peripheral Configuration
      • 5.4.2.5 HDD Configuration
      • 5.4.2.6 Memory Configuration
      • 5.4.2.7 System Agent (SA) Configuration
      • 5.4.2.8 South Bridge Configuration
      • 5.4.2.9 Network Configuration
      • 5.4.2.10 AMT Configuration
      • 5.4.2.11 ME Configuration
    • 5.4.3 Security Menu
      • 5.4.3.1 Trusted Platform Module (TPM) Configuration
    • 5.4.4 Boot Menu
    • 5.4.5 Exit Menu
  • 5.5 Miscellaneous
    • 5.5.1 Supported OS List
    • 5.5.2 Driver Control Table
    • 5.5.3 ACPI Wake Up Support Matrix
    • 5.5.4 Default Boot Sequence
  • 5.6 BIOS Status Codes
    • 5.6.1 Status Code Ranges
    • 5.6.2 Standard Status Codes
  • 5.7 Accessing the MEBX Setup Menu
  • 5.8 BIOS Update
• Firmware
  • 6.1 Embedded Controller Overview
  • 6.2 System BIOS Porting
    • 6.2.1 Host Configuration Address
    • 6.2.2 Index-Data Register Pair
    • 6.2.3 Blanked Logical Device Register Structure
    • 6.2.4 Standard Logical Device Configuration Register
    • 6.2.5 KBC Address to Host Processor
    • 6.2.6 EC I/O Port
      • 6.2.6.1 EC Status Register
    • 6.2.7 EC Command Register
    • 6.2.8 EC Command Program Sequence
    • 6.2.9 EC Space Definition
    • 6.2.10 Event List
    • 6.2.11 OS Driver Support
  • 6.3 EC Firmware Porting
    • 6.3.1 Power Sequence Control
    • 6.3.2 PECI
    • 6.3.3 Thermal & Fan Speed Control
      • 6.3.3.1 Thermal Trip
      • 6.3.3.2 Thermal Throttling
    • 6.3.4 Battery Information - Charging & Discharging Control
    • 6.3.5 Voltage Monitor
    • 6.3.6 Wake Up Requirement
    • 6.3.7 LEDs Control
    • 6.3.8 PS2 Interface & Device Configuration
    • 6.3.9 Input Events Detection through GPIO
  • 6.4 EC Firmware Flash
    • 6.4.1 Flash with SF100
    • 6.4.2 Flash with ECDT
    • 6.4.3 Flash with Utility
    • 6.4.4 Crisis Recovery
  • 6.5 EC Debug Interface
    • 6.5.1 Serial Port
    • 6.5.2 JTAG Interface
• A Replacing the Battery
  • A.1 Overview
  • A.2 Procedure Description
• B Related Documentation
  • B.1 Artesyn Embedded Technologies - Embedded Computing Documentation