Document Outline

• Cover
• Cautions and Warnings
• Revision History
• Table of Contents
• 1 Introduction
  • Front and Rear Views
• 2 Specifications
• 3 Circuit Theory
  • Overview
  • Power Supply
  • Input
    • Input Analog Processing
    • Clock Signals
    • A/D Conversion
    • DC Voltages
  • Output
    • Clock Buffers
    • DAC Conversion
    • Output Analog Processing
  • SHARC Processing
    • +3.3V Power Supply
    • Clocks
    • Reset
    • System Controller Interface
    • PLDs
    • Bus Arbitration
    • Bus Utilization
    • DSP Processing
    • Audio Routing
  • System Controller
    • Control Processing
    • RS232
    • Crown Bus Loop
    • Real Time Clock
    • Front Panel
    • Control Port
  • Front Display
• 4 Maintenance
  • Definitions
  • Required Test Equipment
  • IQ Message String Syntax
  • Standard Initial Conditions
  • Test Procedures
  • Typical Measurements
  • Test/Debug Objects
  • Display Test Patterns
  • Error Codes
  • Troubleshooting FAQs
• 5 Parts
• 6 Exploded View Parts
• 7 Module and Schematic Information
• 8 Module Parts
• PWA 126451-3
  • Component Map
• PWA 126690-3
  • Component Map
• PWA 126693-4
  • Component Map
• PWA 126744-3
  • Component Map
• PWA 126747-3
  • Component Map
• PWA 128045-1
  • Component Map
• PWA 128047-3
  • Component Map
• PWA 128047-4
  • Component Map
• PWA 128049-1
  • Component Map
• PWA 128051-3
  • Component Map
• 9 Schematic Diagrams
  • 126323 Rev. A
  • 126688 Rev. A
  • 126691 Rev. C
  • 126742 Rev. C
  • 126742 Rev. D
  • 126745 Rev. A
  • 126451-3 Rev. A
  • 126690-3 Rev. A
  • 126693-4 Rev. A
  • 126744-3 Rev. A