Document Outline

• 1 User Information
  • 1.1 About This Document
  • 1.2 Copyright Notice
  • 1.3 Trademarks
  • 1.4 Standards
  • 1.5 Warranty
  • 1.6 Technical Support
• 2 Introduction
  • 2.1 Product Description
  • 2.2 Naming clarification
  • 2.3 Understanding COM Express® Functionality
  • 2.4 COM Express® Documentation
  • 2.5 COM Express® Benefits
• 3 Product Specification
  • 3.1 Modules & Accessories
  • 3.2 Functional Specification
    • Processor
      • CPU specifications
    • Memory
    • Chipset
    • Graphics Core
      • Monitor output
      • LVDS
      • Display Interfaces
    • Storage
    • Connectivity
      • Ethernet
    • Misc Interfaces and Features
    • Kontron Features
    • Power Features
    • Power Consumption and Performance
    • Supported Operating Systems
  • 3.3 Block Diagram
  • 3.4 Electrical Specification
    • 3.4.1 Supply Voltage
    • 3.4.2 Power Supply Rise Time
    • 3.4.3 Supply Voltage Ripple
    • 3.4.4 Power Consumption
    • 3.4.5 ATX Mode
    • 3.4.6 Single Supply Mode
  • 3.5 Power Control
    • Power Supply
    • Power Button (PWRBTN#)
    • Power Good (PWR_OK)
    • Reset Button (SYS_RESET#)
    • SM-Bus Alert (SMB_ALERT#)
  • 3.6 Environmental Specification
    • 3.6.1 Temperature Specification
    • 3.6.2 Humidity
  • 3.7 Standards and Certifications
    • RoHS
    • CE marking
    • Component Recognition UL 60950-1
    • WEEE Directive
    • Conformal Coating
    • Shock & Vibration
    • EMC
  • 3.8 MTBF
  • 3.9 Mechanical Specification
    • Dimension
  • 3.10 Thermal Management
  • 3.11 Heatspreader
  • 3.12 Onboard Fan Connector
    • 3.12.1 Electrical Characteristics
• 4 Features and Interfaces
  • 4.1 Onboard SSD
    • Basic features of the PATA NANDrives
    • SLC NANDrive™
  • 4.2 S5 Eco Mode
  • 4.3 LPC
  • 4.4 LPC boot
    • Using an external LPC Firmware Hub
    • To create a BIOS with custom defaults:
  • 4.5 M.A.R.S.
  • 4.6 Fast I2C
  • 4.7 JIDA16 and JIDA32
  • 4.8 K-Station 1
  • 4.9 K-Station & API Resources for JIDA32
    • 4.9.1 I2C
    • 4.9.2 Storage
    • 4.9.3 GPIO
    • 4.9.4 Hardware Monitor
  • 4.10 API Ressources for Board Driver
    • 4.10.1 I2C
    • 4.10.2 Storage
    • 4.10.3 GPIO
    • 4.10.4 Onboard Hardware Monitor
    • 4.10.5 SIO Winbond 83627DHGP
    • 4.10.6 SIO Winbond 83627HG
  • 4.11 GPIO - General Purpose Input and Output
    • Configuration
  • 4.12 Dual Staged Watchdog Timer
    • Basics
    • Time-out events
    • WDT Signal
  • 4.13 Flash Backup Feature
    • To create a BIOS with custom defaults:
    • Flash your BIOS with custom defaults:
  • 4.14 Speedstep Technology
  • 4.15 C-States
  • 4.16 Hyper Threading
  • 4.17 ACPI Suspend Modes and Resume Events
• 5 System Ressources
  • 5.1 Interrupt Request (IRQ) Lines
    • 5.1.1 In 8259 PIC Mode
    • 5.1.2 In APIC mode
  • 5.2 Direct Memory Access (DMA) Channels
  • 5.3 Memory Area
  • 5.4 I/O Address Map
  • 5.5 External Inter-IC (I2C) Bus
  • 5.6 System Management (SM) Bus
  • 5.7 JILI I2C Bus
• 6 Connectors
  • 6.1 Connector Location
  • 6.2 Pinout List
    • 6.2.1 General Signal Description
    • 6.2.2 Connector X1A Row A
    • 6.2.3 Connector X1A Row B
    • 6.2.4 Connector X1B Row C
    • 6.2.5 Connector X1B Row D
• 7 BIOS Operation
  • 7.1 Determining the BIOS Version
  • 7.2 BIOS Update
  • 7.3 Setup Guide
    • 7.3.1 Start AMI® BIOS Setup Utility
      • Menu Bar
      • Legend Bar
      • Selecting an Item
      • Displaying Submenus
      • Item Specific Help Window
      • General Help Window
  • 7.4 BIOS Setup
    • 7.4.1 Main Menu
    • 7.4.2 Module Info
      • Module Component Steppings
      • Module Software Revisions
      • Current LVDS Configuration
    • 7.4.3 Advanced Menu
      • CPU Configuration
      • IDE Configuration
      • IDE Device Submenu
      • SuperIO Configuration
      • ACPI Settings
      • ACPI Cooling Options
      • PCI Express Configuration
      • USB Configuration
      • USB Mass Storage Device Configuration
      • Hardware Health
      • Module Hardware Health
      • Baseboard Hardware Health
      • Miscellaneous Settings
      • MARS Interface Configuration
      • Watchdog
      • Remote Access Configuration
      • LAN Controller
      • GPIO Level Configuration
      • Trusted Computing
    • 7.4.4 PCIPnP Menu
    • 7.4.5 Boot
      • Boot Setting Configuration
    • 7.4.6 Security
    • 7.4.7 Chipset
      • North Bridge Configuration
      • Display Control
      • Internal LVDS Configuration
      • Southbridge Configuration
      • LPC Decode Range
    • 7.4.8 Exit Menu