Document Outline

• Cover
• Contents
• List of Tables
• List of Figures
• About This Manual
  • Using This Manual
  • Text Conventions
  • Register Conventions
  • Related Documents
  • Questions and Comments
• 1 General Description
  • 1.1 MN102H Series Overview
  • 1.2 MN102H Series Features
  • 1.3 MN102H Series Description
  • 1.4 General Specifications
  • 1.5 Block Diagram
  • 1.6 Pin Descriptions
    • 1.6.1 MN102H85K Pin Description
    • 1.6.2 MN102H75K Pin Description
  • 1.7 Bus Interface
    • 1.7.1 Description
    • 1.7.2 Bus Interface Control Registers
• 2 Interrupts
  • 2.1 Description
  • 2.2 Interrupt Setup Examples
    • 2.2.1 Setting Up an External Pin Interrupt
    • 2.2.2 Setting Up a Watchdog Timer Interrupt
  • 2.3 Interrupt Control Registers
• 3 Low-Power Modes
  • 3.1 CPU Modes
    • 3.1.1 Description
    • 3.1.2 Exiting from SLOW Mode to NORMAL Mode
    • 3.1.3 Notes on Invoking and Exiting STOP and HALT Modes
  • 3.2 Turning Individual Functions On and Off
  • 3.3 CPU Control Register
• 4 Timers
  • 4.1 8-Bit Timer Description
  • 4.2 8-Bit Timer Features
  • 4.3 8-Bit Timer Block Diagrams
  • 4.4 8-Bit Timer Timing
  • 4.5 8-Bit Timer Setup Examples
    • 4.5.1 Setting Up an Event Counter Using Timer 0
    • 4.5.2 Setting Up an Interval Timer Using Timers 1 and 2
  • 4.6 8-Bit Timer Control Registers
  • 4.7 16-Bit Timer Description
  • 4.8 16-Bit Timer Features
  • 4.9 16-Bit Timer Block Diagrams
  • 4.10 16-Bit Timer Timing
  • 4.11 16-Bit Timer Setup Examples
    • 4.11.1 Setting Up an Event Counter Using Timer 4
    • 4.11.2 Setting Up a Single-Phase PWM Output Signal Using Timer 4
    • 4.11.3 Setting Up a Two-Phase PWM Output Signal Using Timer 4
    • 4.11.4 Setting Up a Single-Phase Capture Input Using Timer 4
    • 4.11.5 Setting Up a Two-Phase Capture Input Using Timer 4
    • 4.11.6 Setting Up a 4x Two-Phase Encoder Input Using Timer 5
    • 4.11.7 Setting Up a 1x Two-Phase Encoder Input Using Timer 5
    • 4.11.8 Setting Up a One-Shot Pulse Output Using Timer 5
    • 4.11.9 Setting Up an External Count Direction Controller Using Timer 5
    • 4.11.10 Setting Up External Reset Control Using Timer 5
  • 4.12 16-Bit Timer Control Registers
• 5 Serial Interfaces
  • 5.1 Description
  • 5.2 Features
  • 5.3 Connecting the Serial Interfaces
    • 5.3.1 Synchronous Serial Mode Connections
    • 5.3.2 UART Mode Connections
    • 5.3.3 I2C Mode Connection
  • 5.4 UART Mode Baud Rates
  • 5.5 Serial Interface Timing
    • 5.5.1 Synchronous Serial Mode Timing
    • 5.5.2 UART Mode Timing
  • 5.6 Serial Interface Setup Examples
    • 5.6.1 Setting Up UART Transmission Using Serial Interface 0
    • 5.6.2 Setting Up Synchronous Serial Reception Using Serial Interface 0
    • 5.6.3 Setting Up the Serial Interface Clock
    • 5.6.4 Setting Up I2C Transmission Using Serial Interface 0
    • 5.6.5 Setting Up I2C Reception Using Serial Interface 0
  • 5.7 Serial Interface Control Registers
• 6 Analog-to-Digital Converter
  • 6.1 Description
  • 6.2 Features
  • 6.3 Block Diagram
  • 6.4 A/D Conversion Timing
    • 6.4.1 Selecting the ADC Clock Source
    • 6.4.2 Single Channel/Single Conversion Timing
    • 6.4.3 Multiple Channel/Single Conversion Timing
    • 6.4.4 Single Channel/Continuous Conversion Timing
    • 6.4.5 Multiple Channel/Continuous Conversion Timing
  • 6.5 ADC Setup Examples
    • 6.5.1 Setting Up Software-Controlled Single-Channel A/D Conversion
    • 6.5.2 Setting Up Hardware-Controlled Intermittent Three-Channel A/D Conversion
  • 6.6 ADC Control Registers
  • 6.7 Cautions about Analog-to-Digital Converter
• 7 On-Screen Display
  • 7.1 Description
  • 7.2 Features
  • 7.3 Block Diagram
  • 7.4 Power-Saving Considerations in the OSD Block
  • 7.5 OSD Operation
    • 7.5.1 OSD Clock
    • 7.5.2 External Input Sync Signals
    • 7.5.3 Multi-Layer Format
    • 7.5.4 Output Pin Setup
    • 7.5.5 Microcontroller Interface
    • 7.5.6 VRAM
    • 7.5.7 Conditions for VRAM Writes
  • 7.6 Standard and Extended Display Modes
    • 7.6.1 Cursor Layer Display Modes
    • 7.6.2 Graphics Layer Display Modes
  • 7.7 Display Setup Examples
    • 7.7.1 Setting Up the Graphics Layer
    • 7.7.2 Setting Up the Text Layer
  • 7.8 VRAM
    • 7.8.1 VRAM Operation
    • 7.8.2 VRAM Organization
    • 7.8.3 Cautions about the number of display code set to VRAM
  • 7.9 ROM
    • 7.9.1 ROM Organization
    • 7.9.2 Graphics ROM Organization in Different Color Modes
  • 7.10 Setting Up the OSD
    • 7.10.1 Setting Up the OSD Display Colors
    • 7.10.2 Text Layer Functions
    • 7.10.3 Display Sizes
    • 7.10.4 Setting Up the OSD Display Position
  • 7.11 DMA and Interrupt Timing
  • 7.12 Selecting the OSD Dot Clock
  • 7.13 Controlling the Shuttering Effect
    • 7.13.1 Controlling the Shuttered Area
    • 7.13.2 Controlling Shutter Movement
    • 7.13.3 Controlling Shuttering Effects
    • 7.13.4 Controlling Line Shuttering
  • 7.14 Field Detection Circuit
    • 7.14.1 Block Diagram
    • 7.14.2 Description
    • 7.14.3 Considerations for Interlaced Displays
  • 7.15 OSD Registers
• 8 IR Remote Signal Receiver
  • 8.1 Description
  • 8.2 Block Diagram
  • 8.3 IR Remote Signal Receiver Operation
    • 8.3.1 Operating Modes
    • 8.3.2 Noise Filter
    • 8.3.3 8-Bit Data Reception
    • 8.3.4 Identifying the Data Format
    • 8.3.5 Generating Interrupts
      • 8.3.5.1 Leader Detection
      • 8.3.5.2 Trailer Detection
      • 8.3.5.3 8-Bit Data Reception Detection
      • 8.3.5.4 Pin Edge Detection
    • 8.3.6 Controlling the SLOW Mode
  • 8.4 IR Remote Signal Receiver Control Registers
• 9 Closed-Caption Decoder
  • 9.1 Description
  • 9.2 Block Diagram
  • 9.3 Functional Description
    • 9.3.1 Analog-to-Digital Converter
    • 9.3.2 Clamping Circuit
    • 9.3.3 Sync Separator Circuit
      • 9.3.3.1 HSYNC Separator
      • 9.3.3.2 VSYNC Separator
      • 9.3.3.3 Field Detection Circuit
    • 9.3.4 Data Slicer
    • 9.3.5 Controller and Sampling Circuit
      • 9.3.5.1 CRI Detection for Sampling Clock Generation
      • 9.3.5.2 Data Capture Control
  • 9.4 Closed-Caption Decoder Registers
• 10 Pulse Width Modulator
  • 10.1 Description
  • 10.2 Block Diagram
  • 10.3 PWM Data Registers
• 11 I/O Ports
  • 11.1 Description
  • 11.2 I/O Port Circuit Diagrams
  • 11.3 I/O Port Control Registers
• 12 ROM Correction
  • 12.1 Description
  • 12.2 Block Diagram
  • 12.3 Programming Considerations
  • 12.4 ROM Correction Control Registers
• 13 I2C Bus Controller
  • 13.1 Description
  • 13.2 Block Diagram
  • 13.3 Functional Description
  • 13.4 Setting Up the I2C Bus Connection
  • 13.5 SDA and SCL Waveform Characteristics
  • 13.6 I2C Interface Setup Examples
    • 13.6.1 Setting Up a Transition from Master Transmitter to Master Receiver
      • 13.6.1.1 Pre-configuring
      • 13.6.1.2 Setting Up the First Interrupt
      • 13.6.1.3 Setting Up the Second Interrupt
      • 13.6.1.4 Setting Up the Third Interrupt
    • 13.6.2 Setting Up a Transition from Slave Receiver to Slave Transmitter
      • 13.6.2.1 Pre-configuring
      • 13.6.2.2 Setting Up the First Interrupt
      • 13.6.2.3 Setting Up the Second Interrupt
      • 13.6.2.4 Setting Up the Third Interrupt
  • 13.7 I2C Bus Interface Registers
• 14 H Counter
  • 14.1 Description
  • 14.2 Block Diagram
  • 14.3 H Counter Operation
  • 14.4 H Counter Control Registers
• Appendix A Register Map
• Appendix B MN102HF75K Flash EEPROM Version
  • B.1 Description
  • B.2 Benefits
  • B.3 Using the PROM Writer Mode
  • B.4 Using the Onboard Serial Programming Mode
    • B.4.1 Configuring the System for Onboard Serial Programming
    • B.4.2 Circuit Requirements for the Target Board
    • B.4.3 Microcontroller Hardware Used in Onboard Serial Programming
      • B.4.3.1 Serial Writer Interface Description
      • B.4.3.2 Serial Writer Interface Block Diagram
    • B.4.4 Microcontroller Memory Map Used During Onboard Serial Programming
      • B.4.4.1 Flash ROM Address Space
      • B.4.4.2 RAM Address Space
    • B.4.5 Microcontroller Clock on the Target Board
    • B.4.6 Setting Up the Onboard Serial Programming Mode
    • B.4.7 Branching to the User Program
      • B.4.7.1 Branching to the Reset Start Routine
      • B.4.7.2 Branching to the Interrupt Start Routine
  • B.5 Reprogramming Flow
  • B.6 Programming Times
• Record of Changes
• Colophon
• Sales Offices