Document Outline

• COVER
• Main Revisions in This Edition
• PREFACE
• CHAPTER 1 GENERAL
  • 1.1 FEATURES
  • 1.2 ORDERING INFORMATION AND QUALITY GRADE
    • 1.2.1 Ordering Information
    • 1.2.2 Quality Grade
  • 1.3 PIN CONFIGURATION (TOP VIEW)
    • 1.3.1 Normal Operating Mode
    • 1.3.2 PROM Programming Mode
  • 1.4 EXAMPLE APPLICATION SYSTEM (PRINTER)
  • 1.5 BLOCK DIAGRAM
  • 1.6 FUNCTIONS
  • 1.7 DIFFERENCES BETWEEN THE µPD78210Note AND µPD78213
  • 1.8 DIFFERENCES BETWEEN THE µPD78214 SUB-SERIES AND µPD78218A SUB-SERIES
  • 1.9 DIFFERENCES BETWEEN THE µPD78212 AND µPD78212(A)
  • 1.10 DIFFERENCES BETWEEN THE µPD78213 AND µPD78214, AND THE µPD78213(A) AND µPD78214(A)
  • 1.11 DIFFERENCES BETWEEN THE µPD78P214 AND µPD78P214(A)
  • 1.12 DIFFERENCES BETWEEN THE µPD78212, µPD78213, µPD78214, AND µPD78P214
    • 1.12.1 Functional Differences
    • 1.12.2 Package Differences
• CHAPTER 2 PIN FUNCTIONS
  • 2.1 PIN FUNCTION LIST
    • 2.1.1 Normal Operating mode
    • 2.1.2 PROM Programming Mode
  • 2.2 PIN FUNCTIONS
    • 2.2.1 Normal Operating mode
    • 2.2.2 PROM Programming Mode
  • 2.3 I/O CIRCUITS AND UNUSED-PIN HANDLING
  • 2.4 NOTES
• CHAPTER 3 CPU FUNCTION
  • 3.1 MEMORY SPACE
    • 3.1.1 Internal Program Memory Area
    • 3.1.2 Internal RAM Area
    • 3.1.3 Special Function Register (SFR) Area
    • 3.1.4 External SFR Area
    • 3.1.5 External Memory Space
    • 3.1.6 External Extension Data Memory Space
  • 3.2 REGISTERS
    • 3.2.1 Program Counter (PC)
    • 3.2.2 Program Status Word (PSW)
    • 3.2.3 Stack Pointer (SP)
    • 3.2.4 General-Purpose Registers
    • 3.2.5 Special Function Registers (SFR)
  • 3.3 NOTES
• CHAPTER 4 CLOCK GENERATOR
  • 4.1 CONFIGURATION AND FUNCTION
  • 4.2 NOTES
    • 4.2.1 Inputting an External Clock
    • 4.2.2 Using the Crystal/Ceramic Oscillator
• CHAPTER 5 PORT FUNCTIONS
  • 5.1 DIGITAL I/O PORTS
  • 5.2 PORT 0
    • 5.2.1 Hardware Configuration
    • 5.2.2 Setting the Input/Output Mode and Control Mode
    • 5.2.3 Operation
    • 5.2.4 Built-In Pull-Up Resistor
    • 5.2.5 Driving Transistors
  • 5.3 PORT 2
    • 5.3.1 Hardware Configuration
    • 5.3.2 Setting the Input Mode and Control Mode
    • 5.3.3 Operation
    • 5.3.4 Built-In Pull-Up Resistor
  • 5.4 PORT 3
    • 5.4.1 Hardware Configuration
    • 5.4.2 Setting the I/O Mode and Control Mode
    • 5.4.3 Operation
    • 5.4.4 Built-In Pull-Up Resistor
  • 5.5 PORT 4
    • 5.5.1 Hardware Configuration
    • 5.5.2 Setting the I/O Mode and Control Mode
    • 5.5.3 Operation
    • 5.5.4 Built-In Pull-Up Resistor
    • 5.5.5 Driving LEDs Directly
  • 5.6 PORT 5
    • 5.6.1 Hardware Configuration
    • 5.6.2 Setting the I/O Mode and Control Mode
    • 5.6.3 Operation
    • 5.6.4 Built-In Pull-Up Resistor
    • 5.6.5 Driving LEDs Directly
  • 5.7 PORT 6
    • 5.7.1 Hardware Configuration
    • 5.7.2 Setting the I/O Mode and Control Mode
    • 5.7.3 Operation
    • 5.7.4 Built-In Pull-Up Resistor
    • 5.7.5 Note
  • 5.8 PORT 7
    • 5.8.1 Hardware Configuration
    • 5.8.2 Setting the I/O Mode and Control Mode
    • 5.8.3 Operation
    • 5.8.4 Built-In Pull-Up Resistor
    • 5.8.5 Notes
  • 5.9 NOTES
• CHAPTER 6 REAL-TIME OUTPUT FUNCTION
  • 6.1 CONFIGURATION AND FUNCTION
  • 6.2 REAL-TIME OUTPUT CONTROL REGISTER (RTPC)
  • 6.3 ACCESS TO THE REAL-TIME OUTPUT PORT
  • 6.4 OPERATION
  • 6.5 APPLICATION EXAMPLE
  • 6.6 NOTES
• CHAPTER 7 TIMER/COUNTER UNITS
  • 7.1 16-BIT TIMER/COUNTER
    • 7.1.1 Functions
    • 7.1.2 Configuration
    • 7.1.3 16-Bit Timer/Counter Control Registers
    • 7.1.4 Operation of 16-Bit Timer 0 (TM0)
    • 7.1.5 Compare Register and Capture Register Operations
    • 7.1.6 Basic Operation of Output Control Circuit
    • 7.1.7 PWM Output
    • 7.1.8 PPG Output
    • 7.1.9 Sample Applications
  • 7.2 8-BIT TIMER/COUNTER 1
    • 7.2.1 Functions
    • 7.2.2 Configuration
    • 7.2.3 8-Bit Timer/Counter 1 Control Registers
    • 7.2.4 Operation of 8-Bit Timer 1 (TM1)
    • 7.2.5 Compare Register and Capture/Compare Register Operations
    • 7.2.6 Sample Applications
  • 7.3 8-BIT TIMER/COUNTER 2
    • 7.3.1 Functions
    • 7.3.2 Configuration
    • 7.3.3 8-Bit Timer/Counter 2 Control Registers
    • 7.3.4 Operation of 8-Bit Timer 2 (TM2)
    • 7.3.5 External Event Counter Function
    • 7.3.6 One-Shot Timer Function
    • 7.3.7 Compare Register and Capture Register Operations
    • 7.3.8 Basic Operation of Output Control Circuit
    • 7.3.9 PWM Output
    • 7.3.10 PPG Output
    • 7.3.11 Sample Applications
  • 7.4 8-BIT TIMER/COUNTER 3
    • 7.4.1 Functions
    • 7.4.2 Configuration
    • 7.4.3 8-Bit Timer/Counter 3 Control Registers
    • 7.4.4 Operation of 8-Bit Timer 3 (TM3)
    • 7.4.5 Compare Register Operation
    • 7.4.6 Sample Applications
  • 7.5 NOTES
    • 7.5.1 Common Notes on All Timers/Counters
    • 7.5.2 Notes on 16-Bit Timer/Counter
    • 7.5.3 Notes on 8-Bit Timer/Counter 2
    • 7.5.4 Notes on Using In-Circuit Emulators
• CHAPTER 8 A/D CONVERTER
  • 8.1 CONFIGURATION
  • 8.2 A/D CONVERTER MODE REGISTER (ADM)
  • 8.3 OPERATION
    • 8.3.1 Basic A/D Converter Operation
    • 8.3.2 Select Mode
    • 8.3.3 Scan Mode
    • 8.3.4 A/D Conversion Activated by Software Start
    • 8.3.5 A/D Conversion Activated by Hardware Start
  • 8.4 INTERRUPT REQUEST FROM THE A/D CONVERTER
  • 8.5 SETTING FOR USE OF AN6 AND AN7
  • 8.6 NOTES
• CHAPTER 9 ASYNCHRONOUS SERIAL INTERFACE
  • 9.1 CONFIGURATION
  • 9.2 ASYNCHRONOUS SERIAL INTERFACE CONTROL REGISTER
  • 9.3 ASYNCHRONOUS SERIAL INTERFACE OPERATIONS
    • 9.3.1 Data Format
    • 9.3.2 Parity Types and Operations
    • 9.3.3 Transmission
    • 9.3.4 Reception
    • 9.3.5 Reception Error
  • 9.4 BAUD RATE GENERATOR
    • 9.4.1 Configuration of the Baud Rate Generator for UART
    • 9.4.2 Baud Rate Generator Control Register (BRGC)
    • 9.4.3 Operation of the Baud Rate Generator for UART
  • 9.5 BAUD RATE SETTING
    • 9.5.1 Example of Setting the BRGC Register When the Baud Rate Generator for UART Is Used
    • 9.5.2 Example of Setting the Baud Rate When 8-bit Timer/Counter 3 Is Used
    • 9.5.3 Example of Setting the BRGC When the External Baud Rate Input (ASCK) Is Used
  • 9.6 NOTES
• CHAPTER 10 CLOCK SYNCHRONOUS SERIAL INTERFACE
  • 10.1 FUNCTION
  • 10.2 CONFIGURATION
  • 10.3 CONTROL REGISTERS
    • 10.3.1 Clock Synchronous Serial Interface Mode Register (CSIM)
    • 10.3.2 Serial Bus Interface Control Register (SBIC)
  • 10.4 OPERATIONS IN THE THREE-WIRE SERIAL I/O MODE
    • 10.4.1 Basic Operation Timing
    • 10.4.2 Operation When Only Transmission Is Permitted
    • 10.4.3 Operation When Only Reception Is Permitted
    • 10.4.4 Operation When Both Transmission and Reception Are Permitted
    • 10.4.5 Action to Be Taken When the Serial Clock and Shift Become Asynchronous
  • 10.5 SBI MODE
    • 10.5.1 Features of SBI
    • 10.5.2 Configuration of the Serial Interface
    • 10.5.3 Detecting an Address Match
    • 10.5.4 Control Registers in SBI Mode
  • 10.6 SBI COMMUNICATION AND SIGNALS
    • 10.6.1 Bus Release Signal (REL)
    • 10.6.2 Command Signal (CMD)
    • 10.6.3 Address
    • 10.6.4 Command and Data
    • 10.6.5 Acknowledge Signal (ACK#)
    • 10.6.6 Busy Signal (BUSY#) and Ready Signal (READY)
    • 10.6.7 Signals
    • 10.6.8 Communication
    • 10.6.9 Releasing the Busy State
    • 10.6.10 Setting Wake-Up
    • 10.6.11 Starting Transmission and Reception
  • 10.7 NOTES
• CHAPTER 11 EDGE DETECTION FUNCTION
  • 11.1 EXTERNAL INTERRUPT MODE REGISTERS (INTM0, INTM1)
  • 11.2 EDGE DETECTION ON PIN P20
  • 11.3 EDGE DETECTION ON PINS P21 TO P26
  • 11.4 NOTES
• CHAPTER 12 INTERRUPT FUNCTIONS
  • 12.1 INTERRUPT REQUEST SOURCES
    • 12.1.1 Software Interrupt Request
    • 12.1.2 Nonmaskable Interrupt Request
    • 12.1.3 Maskable Interrupt Request
    • 12.1.4 Selecting an Interrupt Source
  • 12.2 INTERRUPT HANDLING CONTROL REGISTERS
    • 12.2.1 Interrupt Request Flag Register (IF0)
    • 12.2.2 Interrupt Mask Register (MK0)
    • 12.2.3 Interrupt Service Mode Register (ISM0)
    • 12.2.4 Priority Specification Flag Register (PR0)
    • 12.2.5 Interrupt Status Register (IST)
    • 12.2.6 Program Status Word (PSW)
  • 12.3 INTERRUPT HANDLING
    • 12.3.1 Accepting Software Interrupts
    • 12.3.2 Accepting Nonmaskable Interrupts
    • 12.3.3 Accepting Maskable Interrupts
    • 12.3.4 Multiple-Interrupt Handling
    • 12.3.5 Interrupt Request and Macro Service Pending
    • 12.3.6 Interrupt and Macro Service Operation Timing
  • 12.4 MACRO SERVICE FUNCTION
    • 12.4.1 Macro Service Outline
    • 12.4.2 Macro Service Types
    • 12.4.3 Macro Service Basic Operation
    • 12.4.4 Macro Service Control Register
    • 12.4.5 Macro Service Type A
    • 12.4.6 Type B Macro Service
    • 12.4.7 Macro Service Type C
  • 12.5 NOTES
• CHAPTER 13 LOCAL BUS INTERFACE FUNCTION
  • 13.1 CONTROL REGISTERS
    • 13.1.1 Memory Expansion Mode Register (MM)
    • 13.1.2 Programmable Wait Control Register (PW)
  • 13.2 MEMORY EXPANSION FUNCTION
    • 13.2.1 External Memory Expansion Function
    • 13.2.2 1M-Byte Expansion Function
    • 13.2.3 Memory Mapping with Expanded Memory
    • 13.2.4 Example of Connecting Memories
  • 13.3 INTERNAL ROM HIGH-SPEED FETCH FUNCTION
  • 13.4 WAIT FUNCTION
  • 13.5 PSEUDO STATIC RAM REFRESH FUNCTION
    • 13.5.1 Function
    • 13.5.2 Refresh Mode Register (RFM)
    • 13.5.3 Operation
    • 13.5.4 Example of Connecting Pseudo Static RAM
  • 13.6 NOTES
• CHAPTER 14 STANDBY FUNCTION
  • 14.1 FUNCTION OVERVIEW
  • 14.2 STANDBY CONTROL REGISTER (STBC)
  • 14.3 HALT MODE
    • 14.3.1 Specifying HALT Mode and Operation States in HALT Mode
    • 14.3.2 Releasing HALT Mode
  • 14.4 STOP MODE
    • 14.4.1 Specifying STOP Mode and Operation States in STOP Mode
    • 14.4.2 Releasing STOP Mode
    • 14.4.3 Notes on Using STOP Mode
  • 14.5 NOTES
• CHAPTER 15 RESET FUNCTION
  • 15.1 RESET FUNCTION
  • 15.2 NOTE
• CHAPTER 16 APPLICATION EXAMPLES
  • 16.1 OPEN-LOOP CONTROL OF STEPPER MOTORS
  • 16.2 SERIAL COMMUNICATION WITH MULTIPLE DEVICES
• CHAPTER 17 PROGRAMMING FOR THE µPD78P214
  • 17.1 OPERATING MODE
  • 17.2 PROCEDURE FOR WRITING INTO PROM
  • 17.3 PROCEDURE FOR READING FROM PROM
  • 17.4 NOTE
• CHAPTER 18 INSTRUCTION OPERATIONS
  • 18.1 LEGEND
    • 18.1.1 Operand Field
    • 18.1.2 Operation Field
    • 18.1.3 Flag Field
  • 18.2 LIST OF OPERATIONS
  • 18.3 INSTRUCTION LISTS FOR EACH ADDRESSING TYPE
• APPENDIX A 78K/II SERIES PRODUCT LIST
• APPENDIX B DEVELOPMENT TOOLS
  • B.1 HARDWARE
  • B.2 SOFTWARE
    • B.2.1 Language Processing Software
    • B.2.2 Software for the In-Circuit Emulator
    • B.2.3 Software for the PROM Programmer
    • B.2.4 OS for the IBM PC
  • B.3 UPGRADING OTHER IN-CIRCUIT EMULATORS TO 78K/II SERIES LEVEL
    • B.3.1 Upgrading to IE-78240-R-A Level
    • B.3.2 Upgrading to IE-78240-R Level
    • B.3.3 Upgrading to IE-78210-R Level
• APPENDIX C SOFTWARE FOR EMBEDDED APPLICATIONS
  • C.1 FUZZY INFERENCE DEVELOPMENT SUPPORT SYSTEM
• APPENDIX D REGISTER INDEX
  • D.1 REGISTER INDEX
  • D.2 REGISTER SYMBOL INDEX
• APPENDIX E INDEX
  • E.1 INDEX
  • E.2 SYMBOL INDEX