Document Outline

• Features
• 1. Description
• 2. Pin Configurations and Pinouts
• 3. Block Diagram
• 4. Memory Array
• 5. Device Operation
• 6. Read Commands
  • 6.1 Continuous Array Read (Legacy Command: E8H): Up to 66MHz
  • 6.2 Continuous Array Read (High Frequency Mode: 0BH): Up to 66MHz
  • 6.3 Continuous Array Read (Low Frequency Mode: 03H): Up to 33MHz
  • 6.4 Main Memory Page Read
  • 6.5 Buffer Read
• 7. Program and Erase Commands
  • 7.1 Buffer Write
  • 7.2 Buffer to Main Memory Page Program with Built-in Erase
  • 7.3 Buffer to Main Memory Page Program without Built-in Erase
  • 7.4 Page Erase
  • 7.5 Block Erase
  • 7.6 Sector Erase
  • 7.7 Chip Erase
  • 7.8 Main Memory Page Program Through Buffer
• 8. Sector Protection
  • 8.1 Software Sector Protection
    • 8.1.1 Enable Sector Protection Command
    • 8.1.2 Disable Sector Protection Command
    • 8.1.3 Various Aspects About Software Controlled Protection
• 9. Hardware Controlled Protection
  • 9.1 Sector Protection Register
    • 9.1.1 Erase Sector Protection Register Command
    • 9.1.2 Program Sector Protection Register Command
    • 9.1.3 Read Sector Protection Register Command
    • 9.1.4 Various Aspects About the Sector Protection Register
• 10. Security Features
  • 10.1 Sector Lockdown
    • 10.1.1 Sector Lockdown Register
    • 10.1.2 Reading the Sector Lockdown Register
  • 10.2 Security Register
    • 10.2.1 Programming the Security Register
    • 10.2.2 Reading the Security Register
• 11. Additional Commands
  • 11.1 Main Memory Page to Buffer Transfer
  • 11.2 Main Memory Page to Buffer Compare
  • 11.3 Auto Page Rewrite
  • 11.4 Status Register Read
• 12. Deep Power-down
  • 12.1 Resume from Deep Power-down
• 13. “Power of 2” Binary Page Size Option
  • 13.1 Programming the Configuration Register
• 14. Manufacturer and Device ID Read
  • 14.1 Manufacturer and Device ID Information
    • 14.1.1 Byte 1 – Manufacturer ID
    • 14.1.2 Byte 2 – Device ID (Part 1)
    • 14.1.3 Byte 3 – Device ID (Part 2)
    • 14.1.4 Byte 4 – Extended Device Information String Length
  • 14.2 Operation Mode Summary
• 15. Command Tables
• 16. Power-on/Reset State
  • 16.1 Initial Power-up/Reset Timing Restrictions
• 17. System Considerations
• 18. Electrical Specifications
• 19. Input Test Waveforms and Measurement Levels
• 20. Output Test Load
• 21. AC Waveforms
  • 21.1 Waveform 1 – SPI Mode 0 Compatible (for Frequencies up to 66MHz)
  • 21.2 Waveform 2 – SPI Mode 3 Compatible (for Frequencies up to 66MHz)
  • 21.3 Waveform 3 – RapidS Mode 0 (FMAX = 66MHz)
  • 21.4 Waveform 4 – RapidS Mode 3 (FMAX = 66MHz)
  • 21.5 Utilizing the RapidS Function
  • 21.6 Reset Timing
  • 21.7 Command Sequence for Read/Write Operations for Page Size 256-Bytes (Except Status Register Read, Manufacturer and Device ID Read)
  • 21.8 Command Sequence for Read/Write Operations for Page Size 264-Bytes (Except Status Register Read, Manufacturer and Device ID Read)
• 22. Write Operations
  • 22.1 Buffer Write
  • 22.2 Buffer to Main Memory Page Program (Data from Buffer Programmed into Flash Page)
• 23. Read Operations
  • 23.1 Main Memory Page Read
  • 23.2 Main Memory Page to Buffer Transfer (Data from Flash Page Read into Buffer)
  • 23.3 Buffer Read
• 24. Detailed Bit-level Read Waveform – RapidS Serial Interface Mode 0/Mode 3
  • 24.1 Continuous Array Read (Legacy Opcode E8H)
  • 24.2 Continuous Array Read (Opcode 0BH)
  • 24.3 Continuous Array Read (Low Frequency: Opcode 03H)
  • 24.4 Main Memory Page Read (Opcode: D2H)
  • 24.5 Buffer Read (Opcode D4H or D6H)
  • 24.6 Buffer Read (Low Frequency: Opcode D1H or D3H)
  • 24.7 Read Sector Protection Register (Opcode 32H)
  • 24.8 Read Sector Lockdown Register (Opcode 35H)
  • 24.9 Read Security Register (Opcode 77H)
  • 24.10 Status Register Read (Opcode D7H)
  • 24.11 Manufacturer and Device Read (Opcode 9FH)
• 25. Auto Page Rewrite Flowchart
• 26. Ordering Information
  • 26.1 Ordering Code Detail
  • 26.2 Green Package Options (Pb/Halide-free/RoHS Compliant)
• 27. Packaging Information
  • 27.1 8M1-A – MLF (VDFN)
  • 27.2 8S1 – JEDEC SOIC
  • 27.3 8S2 – EIAJ SOIC
• 28. Revision History
• 29. Errata
  • 29.1 No Errata Conditions