Document Outline

• Features
  • Pin Configuration
• Description
  • Block Diagram
  • Comparison between AT90S/LS2323 and AT90S/LS2343
  • Pin Descriptions AT90S/LS2323
    • VCC
    • GND
    • Port B (PB2..PB0)
    • RESET
    • XTAL1
    • XTAL2
  • Pin Descriptions AT90S/LS2343
    • VCC
    • GND
    • Port B (PB4..PB0)
    • RESET
    • CLOCK
  • Clock Options
    • Crystal Oscillator
    • External Clock
• Architectural Overview
  • General-purpose Register File
    • X-register, Y-register and Z- register
  • ALU – Arithmetic Logic Unit
  • In-System Programmable Flash Program Memory
  • EEPROM Data Memory
  • SRAM Data Memory
  • Program and Data Addressing Modes
    • Register Direct, Single Register Rd
    • Register Direct, Two Registers Rd and Rr
    • I/O Direct
    • Data Direct
    • Data Indirect with Displacement
    • Data Indirect
    • Data Indirect with Pre- decrement
    • Data Indirect with Post- increment
    • Constant Addressing Using the LPM Instruction
    • Indirect Program Addressing, IJMP and ICALL
    • Relative Program Addressing, RJMP and RCALL
  • Memory Access and Instruction Execution Timing
  • I/O Memory
    • Status Register – SREG
    • Stack Pointer – SPL
  • Reset and Interrupt Handling
    • Reset Sources
    • Power-on Reset
    • External Reset
    • Watchdog Reset
    • MCU Status Register – MCUSR
    • Interrupt Handling
    • General Interrupt Mask Register – GIMSK
    • General Interrupt Flag Register – GIFR
    • Timer/Counter Interrupt Mask Register – TIMSK
    • Timer/Counter Interrupt FLAG Register – TIFR
    • External Interrupt
    • Interrupt Response Time
    • MCU Control Register – MCUCR
  • Sleep Modes
    • Idle Mode
    • Power-down Mode
• Timer/Counter
  • Timer/Counter Prescaler
  • 8-bit Timer/Counter0
    • Timer/Counter0 Control Register – TCCR0
    • Timer/Counter0 – TCNT0
• Watchdog Timer
  • Watchdog Timer Control Register – WDTCR
• EEPROM Read/Write Access
  • EEPROM Address Register – EEAR
  • EEPROM Data Register – EEDR
  • EEPROM Control Register – EECR
  • Prevent EEPROM Corruption
• I/O Port B
  • Port B Data Register – PORTB
  • Port B Data Direction Register – DDRB
  • Port B Input Pins Address – PINB
  • Port B as General Digital I/O
    • Alternate Functions of Port B
• Memory Programming
  • Program and Data Memory Lock Bits
  • Fuse Bits in AT90S/LS2323
  • Fuse Bits in AT90S/LS2343
  • Signature Bytes
  • Programming the Flash and EEPROM
  • High-voltage Serial Programming
    • High-voltage Serial Programming Algorithm
  • High-voltage Serial Programming Characteristics
  • Low-voltage Serial Downloading
    • Low-voltage Serial Programming Algorithm
    • Data Polling EEPROM
    • Data Polling Flash
  • Low-voltage Serial Programming Characteristics
• Electrical Characteristics
  • Absolute Maximum Ratings*
  • DC Characteristics
  • External Clock Drive Waveforms
  • External Clock Drive
• Typical Characteristics
• AT90S2323/2343 Register Summary
• Ordering Information
• Packaging Information
  • 8P3
  • 8S2