FUJITSU SPARC T5120 - Manual (Page 69)

Detecting and Managing Faults 43
The following example. POST reports a memory error at FB-DIMM location
/SYS/MB/CMP0/BR1/CH0/D0. The error was detected by POST running on core 7,
strand 2.
Related Information
■ “ILOM Properties that Affect POST Behavior” on page 35
■ “Examples of POST Management” on page 37
■ “Run POST in Maximum Mode” on page 39
■ “Clear POST-Detected Faults” on page 41
Managing Faults Using the PSH Feature
These topics explain how to use the Solaris Predictive Self-Healing (PSH) feature to
diagnose conditions that may develop into hardware failures over time, allowing for
corrective intervention before the failure occurs.
■ “Solaris PSH Feature Overview” on page 44
■ “PSH-Detected Fault Console Message” on page 45
■ “Identify PSH-Detected Faults With fmdump” on page 45
■ “Clear PSH-Detected Faults” on page 47
7:2>
7:2>ERROR: TEST = Data Bitwalk
7:2>H/W under test = /SYS/MB/CMP0/BR1/CH0/D0
7:2>Repair Instructions: Replace items in order listed by 'H/W
under test' above.
7:2>MSG = Pin 149 failed on /SYS/MB/CMP0/BR1/CH0/D0 (J2001)
7:2>END_ERROR
7:2>Decode of Dram Error Log Reg Channel 2 bits
60000000.0000108c
7:2> 1 MEC 62 R/W1C Multiple corrected
errors, one or more CE not logged
7:2> 1 DAC 61 R/W1C Set to 1 if the error
was a DRAM access CE
7:2> 108c SYND 15:0 RW ECC syndrome.
7:2>
7:2> Dram Error AFAR channel 2 = 00000000.00000000
7:2> L2 AFAR channel 2 = 00000000.00000000