2 signal descriptions, Table 5-1. dmac signal list, 1 dreq[1:0] and preq[37:0] signals – Intel PXA26X User Manual

Page 161: Figure 5-2. dreq timing requirements, Table 5-1

Advertising
2 signal descriptions, Table 5-1. dmac signal list, 1 dreq[1:0] and preq[37:0] signals | Figure 5-2. dreq timing requirements, Table 5-1 | Intel PXA26X User Manual | Page 161 / 624 2 signal descriptions, Table 5-1. dmac signal list, 1 dreq[1:0] and preq[37:0] signals | Figure 5-2. dreq timing requirements, Table 5-1 | Intel PXA26X User Manual | Page 161 / 624
Advertising