1 trailing bytes in the receive fifo, Re-enable the receive dma channel, 6 slow infrared asynchronous interface – Intel PXA26X User Manual

Page 389: 1 infrared selection register (isr)

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1 trailing bytes in the receive fifo, Re-enable the receive dma channel, 6 slow infrared asynchronous interface | 1 infrared selection register (isr) | Intel PXA26X User Manual | Page 389 / 624 1 trailing bytes in the receive fifo, Re-enable the receive dma channel, 6 slow infrared asynchronous interface | 1 infrared selection register (isr) | Intel PXA26X User Manual | Page 389 / 624
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