10 udc status/interrupt register 0 (usir0), 1 endpoint 0 interrupt request (ir0), 2 endpoint 1 interrupt request (ir1) – Intel PXA26X User Manual

Page 450: 3 endpoint 2 interrupt request (ir2), 4 endpoint 3 interrupt request (ir3), 5 endpoint 4 interrupt request (ir4), 6 endpoint 5 interrupt request (ir5)

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10 udc status/interrupt register 0 (usir0), 1 endpoint 0 interrupt request (ir0), 2 endpoint 1 interrupt request (ir1) | 3 endpoint 2 interrupt request (ir2), 4 endpoint 3 interrupt request (ir3), 5 endpoint 4 interrupt request (ir4), 6 endpoint 5 interrupt request (ir5) | Intel PXA26X User Manual | Page 450 / 624 10 udc status/interrupt register 0 (usir0), 1 endpoint 0 interrupt request (ir0), 2 endpoint 1 interrupt request (ir1) | 3 endpoint 2 interrupt request (ir2), 4 endpoint 3 interrupt request (ir3), 5 endpoint 4 interrupt request (ir4), 6 endpoint 5 interrupt request (ir5) | Intel PXA26X User Manual | Page 450 / 624
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