9 multiple block read, 10 stream write, Set mmc_i_mask to 0x1e – Intel PXA26X User Manual

Page 531: Wait for mmc_i_reg[data_tran_done] interrupt

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9 multiple block read, 10 stream write, Set mmc_i_mask to 0x1e | Wait for mmc_i_reg[data_tran_done] interrupt | Intel PXA26X User Manual | Page 531 / 624 9 multiple block read, 10 stream write, Set mmc_i_mask to 0x1e | Wait for mmc_i_reg[data_tran_done] interrupt | Intel PXA26X User Manual | Page 531 / 624
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