Output phase adjust (si5323, si5366), Fsync realignment (si5366), Including fsync inputs in clock selection (si5366) – Silicon Laboratories SI5375 User Manual

Page 58: Fs_out polarity and pulse width control (si5366), Using fs_out as a fifth output clock (si5366), S i 5 3 x x - r m

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Output phase adjust (si5323, si5366), Fsync realignment (si5366), Including fsync inputs in clock selection (si5366) | Fs_out polarity and pulse width control (si5366), Using fs_out as a fifth output clock (si5366), S i 5 3 x x - r m | Silicon Laboratories SI5375 User Manual | Page 58 / 178 Output phase adjust (si5323, si5366), Fsync realignment (si5366), Including fsync inputs in clock selection (si5366) | Fs_out polarity and pulse width control (si5366), Using fs_out as a fifth output clock (si5366), S i 5 3 x x - r m | Silicon Laboratories SI5375 User Manual | Page 58 / 178
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