C bits configurable as payload or overhead, Built-in support for subrate ds3/e3, Receive plcp framer features – Rainbow Electronics DS3184 User Manual
Page 7: Plcp frame synchronization, C1 cycle/stuff counter interpretation, Frame timing is presented on the 8krefo output pin, Receive cell processor features, Hec error detection and correction; hec discard, Four-cell receive fifo, Receive packet processor features
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C bits configurable as payload or overhead, Built-in support for subrate ds3/e3, Receive plcp framer features | Plcp frame synchronization, C1 cycle/stuff counter interpretation, Frame timing is presented on the 8krefo output pin, Receive cell processor features, Hec error detection and correction; hec discard, Four-cell receive fifo, Receive packet processor features | Rainbow Electronics DS3184 User Manual | Page 7 / 13
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