3 intel® q35 memory controller, Figure 2-4: front side bus (fsb), Figure 2-5: ddr2 dimm sockets – IEI Integration PCIE-Q350 v1.20 User Manual

Page 37

Advertising
3 intel® q35 memory controller, Figure 2-4: front side bus (fsb), Figure 2-5: ddr2 dimm sockets | IEI Integration PCIE-Q350 v1.20 User Manual | Page 37 / 250 3 intel® q35 memory controller, Figure 2-4: front side bus (fsb), Figure 2-5: ddr2 dimm sockets | IEI Integration PCIE-Q350 v1.20 User Manual | Page 37 / 250
Advertising