Motorola MCU 68HC912D60 - Manual (Page 9)

9
MEMORY MAP
Following is the memory map for this development board. Consult the 68HC912D60 technical
reference manual on the CD for internal memory map details for this processor.
FFFF
C000
CONFIG 1 2 3 4
ON ON ON ON
External EPROM
U6/7 (Mon12)
BFFF
1000
External RAM
U4/5
CONFIG 1 2 3 4
ON ON ON OFF
External RAM
U4/5
CONFIG 1 2 3 4
OFF OFF OFF OFF
Internal Flash Memory
On-Chip
FFF
C00
HC12 Internal EEPROM On-Chip
Peripheral Area - see note 2 below
BFF
A00
Unused = A00-B7F
LCD / CS7 = BF0-BFF
CS6 = BE0-BEF
CS5 = BD0-BDF
CS4 = BC0-BCF
CS3 = BB0-BBF CS2 = BA0-BAF
CS1 = B90-B9F
CS0 = B80-B8F
9FF
800
Internal Registers - see note 1 below
See 68HC912D60 Technical Reference Manual
7FF
000
Internal RAM On-Chip
1.
The Internal Register base address is relocated from $000 to $800 on startup by the
debug utilities (Mon12 and NoICE). To preserve this memory map, you must also do this
in your software when booting from flash. To do this, load register $11 with $08 for
example:
MOVB #08,$11 ; post-reset location of INITRG
2. The Peripheral Area (A00-BFF) is set to Narrow (8-bit) data width by the debug utilities. If
using this memory, you must also do this in your software when booting from flash as
follows:
MOVW #$0CF0,PEAR
MOVB #$73,MISC ; Flash on, p-sel stretch = 3