B.25 dma channel assignments, Table b.25: dma channel assignments, B.26 interrupt assignments – Intel Socket 478 AIMB-744 User Manual

Page 106: Table b.26: interrupt assignments

Advertising
background image

AIMB-744 User’s Manual

92

B.25 DMA Channel Assignments

B.26 Interrupt Assignments

Table B.25: DMA channel assignments
Channel

Function

0

Available

1

Available

2

Floppy disk (8-bit transfer)

3

Available

4

Cascade for DMA controller 1

5

Available

6

Available

7

Available

Table B.26: Interrupt assignments
Priority

Interrupt#

Interrupt source

1

NMI

Parity error detected

2

IRQ0

Interval timer

3

IRQ1

Keyboard

-

IRQ2

Interrupt from controller 2 (cascade)

4

IRQ8

Real-time clock

5

IRQ9

Cascaded to INT 0A (IRQ 2)

6

IRQ10

Available

7

IRQ11

Available

8

IRQ12

PS/2 mouse

9

IRQ13

INT from co-processor

10

IRQ14

Primary IDE Channel

11

IRQ15

Secondary IDE Channel

12

IRQ3

Serial communication port 2

13

IRQ4

Serial communication port 1

14

IRQ5

Parallel port 2

15

IRQ6

Diskette controller (FDC)

16

IRQ7

Parallel port 1 (print port)

Advertising