Major revision in this edition – IBM uPD78082 User Manual

Page 6

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Major Revision in This Edition

Page

Description

Throughout

The following products have been already developed

µ

PD78081CU-

×××

, 78081GB-

×××

-3B4, 78082CU-

×××

, 78082GB-

×××

-3B4, 78P083CU, 78P083DU,

78P083GB-3B4

The following products have been added

µ

PD78081GB-

×××

-3BS-MTX, 78082GB-

×××

-3BS-MTX, 78P083GB-3BS-MTX, 78081GB(A)-

×××

-3B4,

78082GB(A)-

×××

-3B4, 78P083CU(A), 78P083GB(A)-3B4, 78P083GB(A)-3BS-MTX, 78081GB(A2)-

×××

-3B4

Changes supply voltage to V

DD

= 1.8 to 5.5V.

p. 9

1.6 78K/0 Series Development has been changed.

p. 13

1.9 Differences between the

µ

PD78081, 78082, and 78P083, the

µ

PD78081(A), 78082(A), and

78P083(A), and the

µ

PD78081(A2) has been added.

p. 19

Cautions regarding the use of functions in common with 2.2.5 (2) (d) ASCK has been added.

p. 72

Cautions concerning the Write to OSMS Command has been added to 5.3 (2) Oscillation mode select

register (OSMS).

p. 73

Cautions concerning external clock input in 5.4.1 Main system clock oscillator has been changed.

p. 108

Figure 7-3. Watchdog Timer Mode Register Format, notes and cautions have been added.

p. 110

Description of 7.4.2 Interval timer operation has been changed.

p. 113

Cautions with regard to rewriting TCL0 to other than same data has been added to 8.3 (1) Timer clock

select register 0 (TCL0).

p. 120

The HSC bit has been added to the A/D Converter Mode

Register in Figure10-1. A/D Converter Block Diagram.

p. 122, 193

10.3 (1) A/D converter mode register (ADM), 13.1.1 Standby function, and Cautions have been added.

p. 137

Figure 11-1. Serial Interface Channel 2 Block Diagram has been corrected.

p. 146, 155

11.3 (4) (a), 11.4.2 (1) (d) (i) Generation of baud rate transmit/receive clock by means of main system

clock have been added.

76800 bps has been added to baud rate generated from the main system clock.

p. 161

Figure 11-10. Receive Error Timing has been corrected.

p. 165

11.4.3 (1) (c) Baud rate generator control register (BRGC) has been added.

p. 168

11.4.3 (3) MSB/LSB switching as start bit has been added.

p. 206

15.1 Memory Size Switching Register has been changed from W to R/W.

p. 205

Items and cautions have been added to Table 15-1. Differences between the

µ

PD78P083 and Mask ROM

Versions.

p. 214

A description of the QTOP microcontroller has been added to 15.5 Screening of One-Time PROM

Versions.

p. 232

Figure A-1. Development Tool Configuration has been changed.

p. 231

APPENDIX A DEVELOPMENT TOOLS

The following Development Tools have been added:

IE-78000-R-A, IE-70000-98-IF-B, IE-70000-98N-IF, IE-70000-PC-IF-B, IE-78000-R-SV3, SM78K0, ID78K0

p. 239

A.4 OS for IBM PC has been added.

p. 240

Table A-2. System-Up Method from Other In-Circuit Emulator to IE-78000-R-A has been added.

p. 244

B.1 Real-time OS has been added.

p. 249

APPENDIX D REVISION HISTORY has been added.

The mark

shows major revised points.

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