Debug board, Sheet 42 of 42 debug board, Schematic diagrams debug board b - 43 – Intel M570TU User Manual
Page 99
Schematic Diagrams
DEBUG Board B - 43
B.Sch
e
m
a
tic D
iag
rams
DEBUG Board
D+5 VS
D +5VS
D +5VS
D+5VS
D+5VS
D+5 VS
D+5 VS
D+5VS
D+5VS
D+5VS
D+5VS
D+5VS
D+5VS
D+5VS D+5VS
D+5VS
D+5VS
LA
LB
LC
LD
LE
LF
LG
HA
HB
HC
HD
HE
HF
HG
80CLK- FH
80DATA-FH
LA
LB
LC
LD
LE
LF
LG
80CL K- FH
D7
LA
LB
LD
LE
D7
LF
LG
HB
HC
HD
HE
HF
HG
HA
80DATA- FH
8 0CLK- FH
LC
D R9
5 60
DC6
10U_10V_1206
DC5
10U_10V_1206
DM2
M-MARK1
DU1
7SEGLED
9
1
2
4
6
7
10
8
3
5
A
B
C
D
E
F
G
VCC
VCC
DOT
D R1 3
5 60
D R1 1
5 60
DD3
*LED_R
A
C
DJ80DEBUG1
85205-5
1
2
3
4
5
DR17
10K
DU2
74HCT164
1
2
8
9
3
4
5
6
10
11
12
13
14
7
A
B
CLK
CLR
QA
QB
QC
QD
QE
QF
QG
QH
VC
C
GN
D
DD2
*LED_R
A
C
D R1 0
5 60
DR8
10K
D R1 5
5 60
DD1
*LED_R
A
C
D R1 2
5 60
D R1 6
5 60
DD8
*LED_R
A
C
DD7
*LED_R
A
C
D R5
5 60
D R1 4
5 60
D R6
5 60
DU4
74HCT164
1
2
8
9
3
4
5
6
10
11
12
13
14
7
A
B
CLK
CLR
QA
QB
QC
QD
QE
QF
QG
QH
VC
C
GN
D
DC4
0.1U
DD5
*LED_R
A
C
D R3
5 60
DC8
0.1U
DC7
0.1U
DD4
*LED_R
A
C
D R4
5 60
DD6
*LED_R
A
C
DC3
0.1U
DM1
M-MARK1
D R2
5 60
DR18
470
D R7
5 60
DC2
10U_10V_1206
DM3
M-MARK1
DC1
10U_10V_1206
DU3
7SEGLED
9
1
2
4
6
7
10
8
3
5
A
B
C
D
E
F
G
VCC
VCC
DOT
D R1
5 60
L PCDET ECT
D0
D7
20
MIL
Sheet 42 of 42
DEBUG Board