Irq — interrupt request register – Samsung S3C8275X User Manual
Page 89
S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
CONTROL
REGISTER
4-19
IRQ
— Interrupt Request Register
DCH
Set 1
Bit
Identifier
.7 .6 .5 .4 .3 .2 .1 .0
Reset Value
0 0 0 0 0 0 0 0
Read/Write
R R R R R R R R
Addressing Mode
Register addressing mode only
.7
Level 7 (IRQ7) Request Pending Bit; External Interrupt P1.4–1.7
0 Not
pending
1 Pending
.6
Level 6 (IRQ6) Request Pending Bit; External Interrupt P1.3
0 Not
pending
1 Pending
.5
Level 5 (IRQ5) Request Pending Bit; External Interrupt P0.2
0 Not
pending
1 Pending
.4
Level 4 (IRQ4) Request Pending Bit; External Interrupt P0.1
0 Not
pending
1 Pending
.3
Level 3 (IRQ3) Request Pending Bit; External Interrupt P0.0
0 Not
pending
1 Pending
.2
Level 2 (IRQ2) Request Pending Bit; Watch Timer Overflow
0 Not
pending
1 Pending
.1
Level 1 (IRQ1) Request Pending Bit; SIO Interrupt
0 Not
pending
1 Pending
.0
Level 0 (IRQ0) Request Pending Bit; Timer 1/A Match, Timer B Match
0 Not
pending
1 Pending