9 smbus alert response address, 4 default configuration option, 5 default strapping options – SMSC USB2513 User Manual

Page 55: 6 reset, 1 external hardware reset_n, Smbus alert response address, Default configuration option, Default strapping options, Reset 8.6.1, External hardware reset_n

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USB 2.0 Hi-Speed Hub Controller

Datasheet

SMSC USB251x

55

Revision 1.0 (3-11-09)

DATASHEET

8.3.9

SMBus Alert Response Address

The SMBALERT# signal is not supported by the hub.

8.3.9.1

Undefined Registers

The registers shown in

Table 8.2

are the defined registers in the hub. Reads to undefined registers

return 00h. Writes to undefined registers have no effect and do not return an error.

8.3.9.2

Reserved Registers

Reserved registers should be written to ‘0’ unless otherwise specified. Contents read should be
ignored.

8.4

Default Configuration Option:

To configure the SMSC hub in its default configuration, strap CFG_SEL[2:0] to 00h. This procedure
configures the hub to the internal defaults and enables the strapping options. Please see

Section 8.2.1,

"Internal Register Set (Common to EEPROM and SMBus)"

for the list of the default values. For specific

pin strapping options, please see

Chapter 5, Pin Descriptions

for instructions on how to modify the

default values. Options include port disable and non-removable pin strapping.

8.5

Default Strapping Options:

The USB251x can be configured via a combination of internal default values and pin strap options.
Please see

Table 8.2

for specific details on how to enable the default/pin-strap configuration option.

The strapping option pins only cover a limited sub-set of the configuration options. The internal default
values will be used for the bits & registers that are not controlled by a strapping option pin. Please
refer to

Table 8.2

for the internal default values that are loaded when this option is selected.

8.6

Reset

There are two different resets that the hub experiences. One is a hardware reset via the RESET_N
pin and the second is a USB Bus Reset.

8.6.1

External Hardware RESET_N

A valid hardware reset is defined as assertion of RESET_N for a minimum of 1

μs after all power

supplies are within operating range. While reset is asserted, the hub (and its associated external
circuitry) consumes less than 500

μA of current from the upstream USB power source.

Assertion of RESET_N (external pin) causes the following:

1. All downstream ports are disabled, and PRTPWR power to downstream devices is removed (unless

BC_EN is enabled).

2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.

3. All transactions immediately terminate; no states are saved.

4. All internal registers return to the default state (in most cases, 00(h)).

5. The external crystal oscillator is halted.

6. The PLL is halted.

The hub is “operational” 500

μs after RESET_N is negated. Once operational, the hub immediately

reads OEM-specific data from the external EEPROM (if the SMBus option is not disabled).

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