SUPER MICRO Computer H8QI6-F - Manual (Page 60)

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H8QI6/i-F Serverboard User’s Manual
NODE0: NODE1 HT Link Width
Link Width
Hyper Transport runs at this width. Options include Auto, 4 Bit, 8 Bit and
16 Bit.
Chipset Confi guration
NorthBridge Confi guration
Memory Confi guration
Bank Interleaving
Select Auto to automatically enable a bank-interleaving memory scheme
when this function is supported by the processor. The options are Auto
and Disabled.
Channel Interleaving
Selects the channel-interleaving memory scheme when this function is
supported by the processor. The options are Disabled, Address Bits 6,
Address Bits 12, XOR of Address Bits [20:16, 6] and XOR of Address
Bits [20:16, 9].
Mem Clk Tristate C3/ALTVID
Use this setting to Enable or Disable memory clock tristate during C3
and ALT VID.
Memory Hole Remapping
When "Enabled", this feature enables hardware memory remapping around
the memory hole. Options are Enabled and Disabled.
CS Sparing
This setting will reserve a spare memory rank in each node when enabled.
Options are Enable and Disable.
DCT Unganged Mode
This setting enables unganged DRAM mode (64-bit). Options are Auto
(ganged mode) and Always (unganged mode).