10 rev. 0.6 – Silicon Laboratories SI2493/57/34/15/04 User Manual

Page 10

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Si2493/57/34/15/04
Global ISOmodem-EVB

10

Rev. 0.6

Figure 10 shows the actual circuit connection between the Si2493/57/34/15/04 and the Si3000.

Figure 10. Circuit Connection between the Si2493/57/34/15/04 and the Si3000

To use voice mode register U71 and data memory location 0x0059 must be properly configured.
Setting data memory 0x0059 = 0x0001 enables the Si24XX TDMA interface. When U71 is set to the value 0x0011
a 16-bit voice sample will be transmitted from the Si3000 through the Si2493/57/34/15/04 and DAA to the remote
device. Likewise, an analog signal from the remote device will pass through the DAA where it is converted to a 16-
bit voice sample, the Si24XX and finally the Si3000 where it is converted back to the analog receive signal.
In this example, the Si3000 has its digital TDMA interface configured as the Slave Serial Mode by adding a 50 k

pull-down resistor to SDO pin and a pull-up 50 k

Ω resistor to SCLK pin. In this mode, the Si3000’s MCLK is driven

by the 2048 kHz clock from Si2493/57/34/15/04. The FSYNC has an 8 kHz pulse input. The bit clock is 2048/
8 = 256 bits per frame sync. Refer to the Si3000 documentation for further details.
To send control information to the Si3000, the Si2493/57/34/15/04 modem chip provides a PCM control port
0x004B that allows the user to send control words across by using the AT memory write command. See Table 4. for
details. Wait for the “OK” (approximately 300 ms after each command). When a connection is established, the “AT.”
command is used to generate the DTMF tone of a number; For example, AT.3<CR> will generate a number 3
DTMF tone without the need for an external DTMF generator. See “Voice Mode Example” for details.

T X D

ESC

RXD

I N T b

CTSb

AOUT

RTSb

RIb

DCDb

SPKR_R

MIC_BIAS

HDST

XTALI

X T A L O

C1A

C1B

SPKR_L

LINEO

LINEI

M I C _IN

R E S E T b

VDD

VDD

VDD

N O T E : D6 (PIN 4) MUST NOT HAVE PULLDOWN RESISTOR

C52

U3

Si2493/57/34/15/04

CLKIN/XTALI

1

X T A L O

2

CLKOUT/EECS/A0

3

D6

4

VD3.3

5

GND

6

VDA

7

RTS/D7

8

VDB

19

GND

20

VD 3.3

21

C2A

13

C1A

14

ESC/D3

22

DCD/D4

23

EECLK/D5

24

CTS/CS

11

RXD/RD

9

TXD/WR

10

R E S E T

12

RI/D1

17

EESD/D2

18

AOUT/INT

15

INT/D0

16

Si3000

MCLK

7

SCLK

8

FSYNC

6

SDI

4

SDO

5

R E S E T

9

LINEI

11

MIC_BIAS

2

MIC_IN

10

LINEO

15

SPKR_L

16

SPKR_R

1

HDST

3

VD

12

V A

13

GND

14

R61

0

C51

C53

R62

47 k

C66

0.1 uF

C50

R63
47 k

C68

0 . 1 uF

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