SMSC LAN9500 - Manual (Page 16)

Hi-Speed USB 2.0 to 10/100 Ethernet Controller
Datasheet
Revision 1.7 (10-02-08) 16 SMSC LAN9500/LAN9500i
DATASHEET
Table 2.5 USB Pins
NUM PINS NAME SYMBOL
BUFFER
TYPE DESCRIPTION
1
USB
DMINUS
USBDM AIO USB DMINUS
Note: The functionality of this pin may be
swapped to USB DPLUS via the
PORT_SWAP configuration strap.
1
USB
DPLUS
USBDP AIO USB DPLUS
Note: The functionality of this pin may be
swapped to USB DMINUS via the
PORT_SWAP configuration strap.
1
External USB
Bias Resistor.
USBRBIAS AI External USB Bias Resistor: Used for setting
HS transmit current level and on-chip termination
impedance. Connect to an external 12K 1.0%
resistor to ground.
1
USB PLL
+1.8V Supply
VDD18USBPLL P USB PLL +1.8V Supply: This pin must be
connected to VDD18CORE for proper operation.
Refer to the LAN9500/LAN9500i reference
schematic for additional connection information.
1
Crystal Input XI ICLK Crystal Input: External 25 MHz crystal input.
Note: This signal can also be driven by a
single-ended clock oscillator. When this
method is used, XO should be left
unconnected
1
Crystal
Output
XO OCLK Crystal Output: External 25 MHz crystal output.
Table 2.6 Ethernet PHY Pins
NUM PINS NAME SYMBOL
BUFFER
TYPE DESCRIPTION
1
Ethernet TX
Data Out
Negative
TXN AIO Ethernet Transmit Data Out Negative: The
transmit data outputs may be swapped internally
with receive data inputs when Auto-MDIX is
enabled.
1
Ethernet TX
Data Out
Positive
TXP AIO Ethernet Transmit Data Out Positive: The
transmit data outputs may be swapped internally
with receive data inputs when Auto-MDIX is
enabled.
1
Ethernet RX
Data In
Negative
RXN AIO Ethernet Receive Data In Negative: The
receive data inputs may be swapped internally
with transmit data outputs when Auto-MDIX is
enabled.
1
Ethernet RX
Data In
Positive
RXP AIO Ethernet Receive Data In Positive: The receive
data inputs may be swapped internally with
transmit data outputs when Auto-MDIX is
enabled.