System architecture, Ddr2 ram flash rom, Ram dsp slices i/o – Pico Communications E-14 User Manual

Page 6

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E‐14 Hardware Reference Manual 

www.picocomputing.com

Pico Computing, Inc.

 
 

 

 

6

 

System Architecture 

 
 

At the core of the Pico E‐14 is a Virtex‐4 FPGA. The FPGA can be dynamically configured to perform any 
number of specialized tasks such as: protocol processing, encryption, or complex mathematical 
functions. Embedded systems benefit from the integrated Power‐PC™ processor available on the EP 
series cards. 


DDR2 RAM

Flash ROM

Gigabit Ethernet

Analog Converters

Serial Transceiver

JTAG

GPIO

RAM

DSP

Slices

I/O

Figure 1


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