Patton electronic 1045RC User Manual

Page 5

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S2-1 and S2-2: RTS/CTS Delay

The combined settings for switches S2-1 and S2-2 determine the

amount of delay between the time the Model 1045RC “sees” RTS and
when it sends CTS. Options are no delay, 7 ms and 53 ms.

S2-1

S2-2

Setting

On

On

7 ms

On

Off

53 ms

Off

On

No delay

Off

Off

No delay

S2-3 and S2-4: Word Length

Switches S2-3 and S2-4 are set in combination to determine the

word length for asynchronous data.

S2-3

S2-4

Setting

Off

On

8 bits

On

On

9 bits

Off

Off

10 bits

On

Off

11 bits

S2-5: Extended Signaling Rate

The setting for switch S2-5 determines the range of variability the

Model 1045RC “looks for” in asynchronous data rates (i.e., the actual
variance from a given frequency level the Model 1045RC will tolerate).

S2-5

Setting

Off

-2.5% to +1% (normal)

On

-2.5% to +2.3% (extended)

S2-6: Asynchronous/Synchronous Mode

The setting for switch S2-6 determines whether the Model 1045RC

is in asynchronous or synchronous operating mode.

S2-6

Setting

On

Asynchronous*

Off

Synchronous

*Note: in asynchronous mode, the Clock Source must be set to
“Internal” (S1-5 = On, S1-6 = On)

7

S2-7: RS-232/V.35 Initiation of Local Analog Loopback Test

The setting for switch S2-7 determines whether or not the Model

1045RC’s local analog loopback test can be initiated by raising pin 18
on the RS-232 interface (pin N on the V.35 interface).

S2-7

Setting

On

RS-232/V.35 initiation enabled

Off

RS-232/V.35 initiation disabled

S2-8: RS-232/V.35 Initiation of Remote Digital Loopback Test

The setting for switch S2-8 determines whether or not the Model

1045RC’s remote digital loopback test can be initiated by raising pin 21
on the RS-232 interface (pin L on the V.35 interface).

S2-8

Setting

On

RS-232/V.35 initiation enabled

Off

RS-232/V.35 initiation disabled

3.1.3 CONFIGURATION JUMPER “JP3”

Jumper JP3 is used to set 2-wire or 4-wire operation. Figure 3

(below) shows the possible positions of the strap on its pegs. Please
note the orientation of the jumper on the PC board.

(continued)

8

Figure 5 Orientation of jumper JP3

Front of PC Board

Rear of PC Board

1

2

3

1

2

3

1

2

3

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