2 coarse and fine registers, Tda8752b, Philips semiconductors – NXP Semiconductors Triple high-speed Analog-to-Digital Converter 110 Msps TDA8752B User Manual
Page 18
Philips Semiconductors
TDA8752B
Triple high-speed Analog-to-Digital Converter 110 Msps
Product specification
Rev. 03 — 21 July 2000
18 of 38
9397 750 07338
© Philips Electronics N.V. 2000. All rights reserved.
The default programmed value is:
•
Programmed code = 127
•
Clamp code = 0
•
ADC output = 0.
9.1.2
Coarse and fine registers
These two registers enable the gain control, the AGC gain with the coarse register
and the reference voltage with the fine register. The coarse register programming
equation is as follows:
(5)
Where: V
ref
= 2.5 V.
The gain correspondence is given in
. The gain is linear with reference to the
programming code (N
FINE
= 0).
The default programmed value is as follows:
•
N
COARSE
= 32
•
Gain = 0.825
•
V
i
to be full-scale = 1.212 V.
To modulate this gain, the fine register is programmed using the above equation. With
a full-scale ADC input, the fine register resolution is a
1
⁄
2
LSB peak-to-peak
(see
for N
COARSE
= 32).
Table 5:
Coding
Programmed code
Clamp code
ADC output
0
−
63.5
underflow
1
−
63
2
−
62.5
...
...
127
0
0
...
...
...
254
63.5
63 or 64
255
64
64
256
120
120
...
...
...
287
136
136
Table 6:
Gain correspondence (COARSE)
N
COARSE
Gain
V
i
to be full-scale (V)
32
0.825
1.212
99
2.5
0.4
GAIN
N
COARSE
1
+
V
ref
1
N
FINE
32
16
Ч
------------------
–
⋅
------------------------------------------------
1
16
------
Ч
N
COARSE
1
+
V
ref
512
N
FINE
–
(
)
⋅
--------------------------------------------------
32
Ч
=
=