Diagnostics of the error detection circuits, Substantial strengthening of data integrity, Main data paths of the a – NEC INTEL 5800/1000 User Manual

Page 9

Advertising
background image

9

Modularization, redundancy and domain segmentation of the system clock

Minimizes downtime, and avoids multi-partition shutdown due to clock failure

Diagnostics of the error detection circuits

Substantial strengthening of data integrity

Main data paths of the A

3

chipset on the Express5800/1000 series

servers have been protected by ECC. When a single bit error is

detected, a hardware error correction is carried out. Furthermore,
paths between the A

3

chipset interfaces support multi-bit error

detection, and resending of errored data.

In addition to maintaining data integrity through these RAS
features, the Express5800/1000 series server has the ability to
run diagnostics on its own error detection circuits. During every
system boot, all error detection circuits are diagnosed for possible
failures. Without this feature, a failure in these circuits could result
in the inability to detect errors during system operation.

Through modularization and redundancy, system downtime, due to
clock failures, have been minimized. The Express5800/1000 series
server has taken it one step further. In many cases, when a system
is said to have a redundant clock, in actuality, only the oscillator
is redundant. Integral clock distribution mechanisms such as the
clock driver or the amplifier are, many times, not redundant. Such
a construct leads to the existence of system single point of failures.
The Express5800/1000 series servers have redundancy in not only

the oscillator, but also in the clock distribution mechanisms so that
system downtime can be minimized.

The 1320Xf system allows for the division of the system into two
16 processor segments, where one segment utilizes one system
clock, and the other 16 processor segment utilizes the remaining
system clock. A failure in a system clock therefore, will not result
in shutdown of the entire system.

Express5800/1000 Series

Redundant: Active, Standby

chipset

chipset

Clock

Distribution

Clock

Module

Clock

Module

Clock

Module

Clock

Module

Clock

Module

Clock

Module

Clock

Module

Hot

pluggable

Not hot

pluggable

Redundant Configuration A

Redundant Configuration A

Redundant Configuration B

Express5800/1000 Series

Redundant

Available on the 1320Xf/1160Xf

16 processor Domain Segmentation

Available on the 1320Xf

Redundant Configuration B

*

1

SPOF

Redundant: Active, Standby

Redundant: Active, Standby

16 Processor Domain

Segmentation

Clock

Module

Clock

Module

16 Processor

Domain

16 Processor

Domain

chipset

chipset

chipset

chipset

chipset

chipset

chipset

chipset

chipset

chipset

chipset

chipset

chipset

chipset

Replacement of failed

component without

system halt

Minimized spread

of failure

*1: Hot plugging of the redundant oscillator is possible, however the hot plugging of the single clock driver is not possible

Clock

Distribution

Clock

Distribution

Clock

Distribution

Clock

Distribution

Clock

Distribution

Cell card

CPU

CPU

CPU

CPU

Memory

Controller

Memory

Controller

Memory

Controller

Memory

Controller

Crossbar Card

Built-in high-speed error
check for inter-chipset
paths

PCI BOX

I/O

Router

I/O

Router

Cell

Controller

Crossbar

Controller

Crossbar

Controller

Crossbar

Controller

Crossbar

Controller

To

other CELL

controller

Advertising