Aux status register, Interrupt polarity control register, 5 aux status register – Omega OME-PIO-D144 User Manual

Page 32: 6 interrupt polarity control register

Advertising
background image

3.3.5 Aux Status Register


(Read/Write): wBase+7
Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0
Note. Refer to Sec. 3.1 for more information about wBase.

Aux0=CN_PC0, Aux1=CN1_PC1, Aux2=CN1_PC2, CN1_Aux3=PC3,

Aux7~4=Aux-ID. Refer to DEMO5.C for more information. The Aux0~3 are used as
interrupt source. The interrupt service routine has to read this register for interrupt
source identification. Refer to Sec. 2.5 for more information.


3.3.6 Interrupt Polarity Control Register


(Read/Write): wBase+0x2A
Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0 0 0 0 CN1_PC3 CN1_PC2 CN1_PC1

CN1_PC0

Note. Refer to Sec. 3.1 for more information about wBase.
For Example:
CN1_PC0=0Æ select the non-inverted signal from PC0 of CN1_PC.
CN1_PC0=1Æ select the inverted signal from PC0 of CN1_PC.

outp(wBase+0x2a,0x0f); /* select the non-inverted input CN1_PC0/1/2/3 */
outp(wBase+0x2a,0); /* select the inverted input of CN1_PC0/1/2/3 */

outp(wBase+0x2a,0x0e); /* select the inverted input of CN1_PC0 */

/* select the non-inverted input CN1_PC1/2/3 */


outp(wBase+0x2a,0x03); /* select the inverted input of CN1_PC0/1 */

/* select the non-inverted input CN1_PC2/3 */

Refer to Sec. 2.5 for more information.
Refer to DEMO5.C for more information.

OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001)

---- 30

Advertising