Texas Instruments SLVP089 - Manual (Page 11)

Schematic
1-3
Hardware
1.2 Schematic
Figure 1–2. Schematic Diagram
DTC
COMP
R9
RT
OUT
SCP
GND
V CC
6
3
4
7
R9
1
5
FB
+
C1
µ 1 F
R2
C3
0.0022
µ F
C2
0.033 µ F
R8
C9 0.22 µ F
C15
µ 1.0 F
R6
2
8
U1
TL5001
1IN
2OUT
GND
V CC
2
4 5
7
2IN
3
1OUT
V DD
REG
8
6 1
R10
R13
IRF7201
NMOS
Q2
U2
TPS2812
C14
0.1 µ F
CR3
BAS16ZX
C11
0.47 µ F
C5
100 µ F
C10
100 µ F
+
2
3
4
1
J1
I V
GND
2
3
4
1
J2
5.5 V to 12 V
Q1
IRF7406
PMOS
C4
µ 0.022 F R3
R4
CR1
30BQ015
R7
C6
1000 pF
L1
27 µ H
C12
100 µ F +
C7
100 +
C13
10
µ F µ F
3.3 V
RTN
+
GND
I V
3.3 V
RTN
CR2
BAS16ZX
15 Ω
121 k Ω
R12 10 k Ω
R11 30 k Ω
90.9 k Ω
1.00 k Ω
1.6 k Ω
R5
10 k Ω
10 k Ω
2.32 k Ω
180 Ω
3.3 Ω
1 k Ω
Note: Frequency is set to 100 kHz by R9. See TL5001 data sheet for the curve of oscillator frequency versus timing resistance.