Texas Instruments MICROPROCESSOR TI SITARA - Manual (Page 13)

DDR Controller
AM3517/05 AM3517/05
SDRAM
Supported
mDDR/DDR2
• Supports mDDR / DDR2
• DDR controller has three
Supported
Measured
Throughput
810MB/sec
• DDR controller has three
functional blocks:
– Virtual Rotated Frame Buffer
(VRFB), supporting rotations of
0 , 90 , 180 ,270
Supported
Size (bits)
16M, 32M (2
Banks)
64M, 128M, 256M,
0 , 90 , 180 ,270
– SDRAM memory-access
scheduler (SMS)
• Optimizes latency and
64M, 128M, 256M,
512M,1G,
2G (4 Banks)
Max Clock
Speed
166MHz
• Optimizes latency and
bandwidth usage among
requestors
– SDRAM Controller
Speed
Chip Selects
2
Data Width 16/32b
– SDRAM Controller
• Physical interface to DDR2 or
mDDR
• Two chip selects
13
Data Width
• Two chip selects