Texas Instruments TLV320DAC23 - Manual (Page 27)

I2C Adjust
4-7 Software
4.4.18 Clock Select Button
Clicking the Clock Select button opens a panel that allows selection of master
clock speed and ADC and DAC sampling rates (see Section 4.6.11). (Do clock
selections correspond to sampling rate register bits?)
4.4.19 Frequency Display Areas
In the lower right corner of the main panel are two frequency displays. The one
on the left shows the master clock frequency MCLK in megaHertz; the one on
the right shows the DAC sampling frequency in kiloHertz.
4.5 I
2
C Adjust
The I 2 C commands are generated on the parallel port using a method referred
to as bit-banging. Because Windows

does not have readily accessible timers
down into the microseconds, the I 2 C clocks are done using C++ for-loops to
create the delay. The number of executions of the for-loop is calibrated initially
when the program is started. This initial calibration sets SCL to 100 kHz. The
looping variable in the for-loop can be changed using the SCL period
A and
"
buttons, which only become active after clicking the Fine Adjust button.
To see the result of changing this variable, requires capturing the SCL output
on a storage oscilloscope. The program recalibrates SCL to 100 kHz if the
RECALIBRATE button is pressed.
Figure 4–3. I 2 C Adjust