Table 1-30 – Xilinx SP605 User Manual

Page 58

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SP605 Hardware User Guide

UG526 (v1.8) September 24, 2012

Chapter 1: SP605 Evaluation Board

Table 1-30:

Onboard Power System Devices

Device Type

Reference

Designator

Description

Power Rail Net

Name

Power Rail

Voltage (V)

Schematic

Page

UCD9240PFC

(1)

U26

PMBus Controller - Core (Addr = 52)

21

PTD08A010W

U18

10A 0.6V - 3.6V Adj. Switching Regulator

VCCINT_FPGA

1.20

(3)

22

PTD08A010W

U19

10A 0.6V - 3.6V Adj. Switching Regulator

VCC2V5_FPGA

2.50

23

PTD08A010W

U20

10A 0.6V - 3.6V Adj. Switching Regulator

VCCAUX

2.50

24

UCD9240PFC

(2)

U27

PMBus Controller - Core (Addr = 53)

26

PTD08A010W

U21

10A 0.6V - 3.6V Adj. Switching Regulator

VCC1V5_FPGA

1.50

29

PTD08A010W

U22

10A 0.6V - 3.6V Adj. Switching Regulator

VCC3V3

3.30

30

TL1963AKTTR

U5

1.5A 12V IN, 5.0V OUT Linear Regulator

VCC5

5.00

21

TPS74401

U51

3A 1.5V IN, 1.2V OUT Linear Regulator

MGT_AVCC

1.20

27

TPS51200DRCT

U11

3A DDR3 VTERM Tracking Linear
Regulator

VTTDDR

0.75

31

TPS51200DRCT

U11

10 mA Tracking Reference output

VTTVREF

0.75

31

TL1963-18DCQR

U44

1.5A 2.5V IN, 1.8V OUT Linear Regulator

VCC1V8

1.80

31

LT1763CS8

U49

500 mA 5V IN, 3.0V OUT Linear
Regulator

VCC3V0

3.00

31

TPS73633DBVT

U10

400 mA 5V IN, 3.30V OUT Linear
Regulator

DVI_VCCA

3.30

17

Notes:

1. See

Table 1-31

., part 1 (addr 52)

2. See

Table 1-31

., part 2 (addr 53)

3. V

CCINT

tolerance meets or exceeds the V

CCINT

±5% specification in the Recommended Operating Conditions table in the

Spartan-6 FPGA Data Sheet.

[Ref 1]

Table 1-31:

Power Rail Specifications (UCD9240 PMBus Controllers at Addresses 52 and 53)

Device

Rail #

Rail

Name

Schematic

Rail Name

Vout

(V)

PG On

(V)

PG Off

(V)

On

Delay

(ms)

Rise
(ms)

Off

Delay

Fall

(ms)

Vout

Over

Fault

(V)

R

espo

n

se

Iout

Over

Fault

(A)

R

espo

n

se

Temp

Over

Fault

(°C)

R

espo

n

se

UCD9240

(Addr 52)

1

Rail

#1

VCCINT

_FPGA

1.2

1.14

1.104

0

10

0

10

1.344

Shut

down

14

Shut

down

80

Shut

down

2

Rail

#2

VCC2V5

_FPGA

2.5

2.375

2.3

2.8

3

Rail

#3

VCCAUX

2.5

2.375

2.3

UCD9240
(Addr 53)

1

Rail

#1

VCC1V5

_FPGA

1.5

1.425

1.38

0

10

0

10

1.68

Shut

down

13.203

Shut

down

80

Shut

down

2

Rail

#2

VCC3V3

3.3

3.135

3.036

3.696

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