Rainbow Electronics MAX7030 - Manual (Page 15)

MAX7030
Low-Cost, 315MHz, 345MHz, and 433.92MHz
ASK Transceiver with Fractional-N PLL
______________________________________________________________________________________ 15
Peak Detectors
The maximum peak detector (PDMAX) and minimum
peak detector (PDMIN), with resistors and capacitors
shown in
Figure 3, create DC output voltages equal to
the high- and low-peak values of the filtered demodulat-
ed signal. The resistors provide a path for the capaci-
tors to discharge, allowing the peak detectors to
dynamically follow peak changes of the data filter out-
put voltages.
The maximum and minimum peak detectors can be
used together to form a data slicer threshold voltage at
a value midway between the maximum and minimum
voltage levels of the data stream (see the Data Slicer
section and
Figure 3). Set the RC time constant of the
peak detector combining network to at least 5 times the
data period.
If there is an event that causes a significant change in
the magnitude of the baseband signal, such as an AGC
gain-switch or a power-up transient, the peak detectors
may “catch” a false level. If a false peak is detected,
the slicing level is incorrect. The MAX7030 peak detec-
tors correct these problems by temporarily tracking the
incoming baseband filter voltage when an AGC state
switch occurs, or forcing the peak detectors to track the
baseband filter output voltage until all internal circuits
are stable following an enable pin low-to-high transition
and also T/R pin high-to-low transition. The peak detec-
tors exhibit a fast attack/slow decay response. This fea-
ture allows for an extremely fast startup or AGC
recovery.
Transmitter
Power Amplifier (PA)
The PA of the MAX7030 is a high-efficiency, open-
drain, class-C amplifier. The PA with proper output-
matching network can drive a wide range of antenna
impedances, which includes a small-loop PC board
trace and a 50 Ω antenna. The output-matching network
for a 50 Ω antenna is shown in the Typical Application
Circuit. The output-matching network suppresses the
carrier harmonics and transforms the antenna imped-
ance to an optimal impedance at PAOUT (pin 5). The
optimal impedance at PAOUT is 250
Ω.
When the output-matching network is properly tuned,
the PA transmits power with a high overall efficiency of
up to 32%. The efficiency of the PA itself is more than
46%. The output power is set by an external resistor at
PAOUT, and is also dependent on the external antenna
and antenna-matching network at the PA output.
Envelope Shaping
The MAX7030 features an internal envelope-shaping
resistor, which connects between the open-drain output
of the PA and the power supply (see the Typical
Application Circuit). The envelope-shaping resistor
slows the turn-on/turn-off of the PA in ASK mode, and
results in a smaller spectral width of the modulated PA
output signal.
Fractional-N Phase-Locked Loop (PLL)
The MAX7030 utilizes a fully integrated, fractional-N,
PLL for its transmit frequency synthesizer. All PLL com-
ponents, including the loop filter, are integrated inter-
nally. The loop bandwidth is approximately 200kHz.
Power-Supply Connections
The MAX7030 can be powered from a 2.1V to 3.6V sup-
ply or a 4.5V to 5.5V supply. If a 4.5V to 5.5V supply is
used, then the on-chip linear regulator reduces the 5V
supply to the 3V needed to operate the chip.
To operate the MAX7030 from a 3V supply, connect
PAV
DD
, AV
DD
, DV
DD
, and HV
IN
to the 3V supply. When
using a 5V supply, connect the supply to HV IN only and
MAX7030
C
PDMAX PDMIN
R
C
R
DATA
SLICER
DATA
PEAK
DET
PEAK
DET
Figure 3. Generating Data-Slicer Threshold Using the Peak
Detectors
MAX7030
C
DS- DS+
R
DATA
SLICER
DATA
Figure 2. Generating Data-Slicer Threshold Using a Lowpass
Filter