Max9486, Detailed description, Functional diagram – Rainbow Electronics MAX9486 User Manual

Page 6

Advertising
background image

MAX9486

Detailed Description

The MAX9486 is a high-performance clock synthesizer
with an 8kHz input reference clock. This device gener-
ates six identical buffered LVTTL clock outputs at
35.328MHz. The MAX9486 features two PLLs. The first
PLL (PLL1) uses an internal VCXO, locked to the 8kHz
reference CLK, to generate a 17.664MHz CLK output
for the second PLL (PLL2). PLL2 multiplies the VCXO
frequency by a factor of 2 to produce the 35.328MHz
outputs. In addition, this device features a low-jitter
8kHz output that provides a better source for the refer-
ence clock relay (see the

Functional Diagram).

Power-Up

At power-up, all the outputs are disabled and pulled
low (to GND) for at least 256ms. After 256ms, the crys-
tal oscillator starts oscillation. The input reference clock
for PLL1 is 8kHz and its output frequency, 17.664MHz,
is also the reference clock for PLL2. If the 8kHz refer-
ence clock is not present at power-up, the output fre-
quency of PLL1 is locked to the center frequency of the
crystal oscillator.

8kHz Reference CLK Monitor

The MAX9486 features an internal clock (CLK) monitor
circuitry to detect the presence of the external 8kHz ref-
erence clock. The internal CLK monitor continuously
monitors the number of low-to-high transitions within a

three-cycle (at 8kHz) time window. If the transition num-
ber is less than two, the internal CLK monitor states
loss of the reference CLK. However, if in a three-cycle
time window the monitor counts two or three transitions,
it considers the input reference clock as present. When
the monitor detects the absence of the 8kHz reference
clock, PLL2 is forced to lock to the crystal oscillator fre-
quency. However, when the monitor detects the return
of the reference clock, PLL1 locks to the reference
clock again.

Clock Outputs (CLK1 to CLK6) and REO

The MAX9486 uses a 17.664MHz crystal and a refer-
ence clock (REIN) to generate six identical outputs,
CLK1 to CLK6, at 35.328MHz. All CLK_ outputs are
LVTTL with a skew of 185ps. The MAX9486 also regen-
erates the 8kHz reference CLK at REO output.

Voltage-Controlled Crystal

Oscillator (VCXO)

The MAX9486’s internal VCXO takes an external
17.664MHz crystal as the base frequency and has a
pulling range of approximately

±200ppm. This configu-

ration also makes the VCXO PLL become a narrowband
filter to reject high-frequency jitter on the input reference
and eliminate it from the REO and CLK_ outputs.

8kHz Reference Clock Synthesizer
with Multiple Outputs at 35.328MHz

6

_______________________________________________________________________________________

MAX9486

PLL1

CLK2

VCXO

X1

CLK1

V

DDP

GNDP

/2208

PHASE DETECTOR

AND

CHARGE PUMP

PLL2

VCO

/2

X2

REO

CLK6

CLK5

CLK4

CLK3

GND

V

DD

LP1

LP2

REFERENCE CLK

MONITOR

REIN

SETI

PHASE DETECTOR,

CHARGE PUMP, AND

LOOP FILTER

SHDN

Functional Diagram

Advertising