Applications information, Snubber, High dv/dt on vdd – Rainbow Electronics MAX13256 User Manual

Page 10: Power dissipation, High temperature operation, Hot insertion, Output-ripple filtering, Figure 3. output snubber, Figure 4. secondary-side rectification topologies, Figure 5. output ripple filtering

Advertising
background image

���������������������������������������������������������������� Maxim Integrated Products 10

MAX13256

36V H-Bridge Transformer

Driver for Isolated Supplies

Applications Information

Snubber

For V

DD

greater than 27V, use a simple RC snubber

circuit on ST1 and ST2 to ensure that the peak voltage is
less than 40V during switching (

Figure 4

). Recommended

values for the snubber are R = 91I and C = 330pF.

Power Dissipation

The power dissipation of the device is approximated by:

P

D

= (R

OHL

x I

PRI2

) + (I

DD

x V

DD

)

where R

OHL

is the combined high-side and low-side on-

resistance of the internal FET drivers, and IPRI is the load

current flowing through ST1 and ST2.

High-Temperature Operation

When the MAX13256 is operated under high ambient
temperatures, the power dissipated in the package can
raise the junction temperature close to thermal shutdown.
Under such temperature conditions, the power dissipa-
tion should be held low enough so that that junction tem-
perature observes a factor of safety margin. The maximum
junction temperature should be held below +140°C. Use
the package’s thermal resistances to calculate the junc-
tion temperature. Alternatively use the Maximum Output
Current vs. Temperature curves shown in the

Typical

Operating Characteristics

section to determine the maxi-

mum ST1/ST2 load currents.

Hot Insertion

If the MAX13256 is inserted into a live backplane, it is
possible to damage the device. Damage is caused by
overshoot on V

DD

exceeding the absolute maximum

rating. Limit the transient input voltage to the MAX13256
with an external protection device.

Output-Ripple Filtering

Output-voltage ripple can be reduced with a lowpass LC
filter (see

Figure 5

). The component values shown give a

cutoff frequency of 21.5kHz by the equation:

3dB

1

f

2

LC

=

π

Use an inductor with low DC resistance and sufficient sat-
uration current rating to minimize filter power dissipation.

Power-Supply Decoupling

Bypass V

DD

to ground with a 1FF ceramic capacitor as

close as possible to the device.

Figure 4. Output Snubber

Figure 3. Secondary-Side Rectification Topologies

Figure 5. Output Ripple Filtering

N:1 CT

FIGURE 3A. PUSH-PULL RECTIFICATION

N:1

N:1

+

V

IN

-

V

OUT

= 1/(

2 x N) x V

IN

- V

D

+

-

V

D =

DIODE FORWARD VOLTAGE

V

OUT =

2(V

IN

/N - V

D

)

+

-

V

OUT =

V

IN

/N

-

2V

D

+

-

+

V

IN

-

+

V

IN

-

FIGURE 3B. VOLTAGE DOUBLER

FIGURE 3C. FULL-WAVE RECTIFIER

FILTER

OUTPUT

C

2.2µF

L

25µH

R
91I

ST1

ST2

C

330pF

R
91I

C

330pF

Advertising