Rainbow Electronics MAX5069 - Manual (Page 9)

Detailed Description
The MAX5069 is a current-mode, dual MOSFET driver,
PWM controller designed for isolated and nonisolated
push-pull or half-/full-bridge power-supply applications.
A bootstrap UVLO with a programmable hysteresis,
very low startup, and low operating current result in
high-efficiency universal-input power supplies. In addi-
tion to the internal bootstrap UVLO, the device also
offers programmable input startup and turn-off volt-
ages, programmed through the UVLO/EN pin.
The MAX5069 includes a cycle-by-cycle current limit
that turns off the gate drive to the external MOSFET
during an overcurrent condition. The MAX5069 integrat-
ing fault protection reduces average power dissipation
during persistent fault conditions (see the Integrating
Fault Protection section).
The MAX5069 features a very accurate, wide-range,
programmable oscillator that simplifies and optimizes
the design of the magnetics. The MAX5069A/B are well
suited for universal-input (rectified 85VAC to 265VAC)
or telecom (-36VDC to -72VDC) power supplies. The
MAX5069C/D are well suited for low-input voltage
(10.8VDC to 24VDC) power supplies.
The MAX5069 high-frequency, universal input,
offline/telecom, current-mode PWM controller integrates
all the building blocks necessary for implementing AC-
DC and DC-DC fixed-frequency power supplies. Push-
pull and half-/full-bridge isolated or nonisolated power
supplies are easily constructed using either primary- or
secondary-side regulation. Current-mode control with
leading-edge blanking simplifies control-loop design
and the programmable slope compensation stabilizes
the current loop when operating both FET drivers at a
combined 100% duty cycle.
An input UVLO programs the input-supply startup volt-
age and ensures proper operation during brownout con-
ditions. An external voltage-divider programs the supply
startup voltage. The MAX5069B/C feature a programma-
ble UVLO hysteresis. The MAX5069A/B feature an addi-
tional internal bootstrap UVLO with large hysteresis that
requires a minimum startup voltage of 23.6V. The
MAX5069A/D start up from a minimum voltage of 10.8V.
Internal digital soft-start reduces output-voltage over-
shoot at startup.
A single external resistor programs the switching fre-
quency of each MOSFET driver from 25kHz to
1.25MHz. The MAX5069A/D provide a SYNC input for
synchronization to an external clock. The maximum FET
driver duty cycle for each driver is limited to 50%.
Programmable dead time allows additional flexibility in
optimizing magnetic design and overcoming parasitic
effects. Integrating fault protection ignores transient
overcurrent conditions for a set length of time. The
length of time is programmed by an external capacitor.
The internal thermal-shutdown circuit protects the
device should the junction temperature exceed
+170°C.
Power supplies designed with the MAX5069A/B use a
high-value startup resistor, R1, which charges a reser-
voir capacitor, C1 (Figure 1). During this initial period,
while the voltage is less than the internal bootstrap
UVLO threshold, the device typically consumes only
47µA of quiescent current. This low startup current and
the large bootstrap UVLO hysteresis help to minimize
the power dissipation across R1 even at the high end of
the universal AC input voltage (265VAC).
The MAX5069 includes a cycle-by-cycle current limit
that turns off the gates to both external MOSFETs dur-
ing an overcurrent condition. When using the
MAX5069A/B in the bootstrap mode (if the power-sup-
ply output is shorted), the tertiary winding voltage
drops below the 9.74V threshold, causing the UVLO to
turn off the gate to the external power MOSFETs. This
reinitiates a startup sequence with soft-start.
Current-Mode Control
The MAX5069 offers a current-mode control operation
feature, such as leading-edge blanking with a dual
internal path that only blanks the sensed current signal
applied to the input of the PWM controller. The current-
limit comparator monitors CS at all times and provides
cycle-by-cycle current limit without being blanked. The
leading-edge blanking of the CS signal prevents the
PWM comparator from prematurely terminating the on
cycle. The CS signal contains a leading-edge spike
that results from the MOSFET’s gate charge current,
and the capacitive and diode reverse-recovery current
of the power circuit. Since this leading-edge spike is
normally lower than the current-limit comparator thresh-
old, current limiting is provided under all conditions.
Use the MAX5069 in push-pull and half-/full-bridge appli-
cations where a large duty cycle is desired. The large
duty cycle results in much lower operating primary RMS
currents through the MOSFET switches, and in most
cases it results in a smaller inductor and output filter
capacitor. The MAX5069 adjusted slope compensation
allows for easy stabilization of the inner current loop.
MAX5069
High-Frequency, Current-Mode PWM Controller
with Accurate Oscillator and Dual FET Drivers
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