Control bits: output format (01h) – Rainbow Electronics MAX19516 User Manual
Page 18
MAX19516
Dual-Channel, 10-Bit, 100Msps ADC
18
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HPS_SHDN0
STBY_SHDN0
CHA_ON_SHDN0
CHB_ON_SHDN0
SHDN INPUT = 0*
HPS_SHDN1
STBY_SHDN1
CHA_ON_SHDN1
CHB_ON_SHDN1
SHDN INPUT = 1**
X
0
0
0
Complete power-down
0
0
0
1
Channel B active, channel A full power-down
0
0
1
0
Channel A active, channel B full power-down
0
X
1
1
Channels A and B active
0
1
0
0
Channels A and B in standby mode
0
1
0
1
Channel B active, channel A standby
0
1
1
0
Channel A active, channel B standby
1
1
0
0
Channels A and B in standby mode
1
X
X
1
Channels A and B active, output is averaged
1
X
1
X
Channels A and B active, output is averaged
Control Bits:
Output Format (01h)
In addition to power management, the HPS_SHDN1
and HPS_SHDN0 activate an A+B adder mode. In this
mode, the results from both channels are averaged.
The MUX_CH bit selects which bus the (A+B)/2 data is
presented.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
0
0
0
BIT_ORDER_B
BIT_ORDER_A
MUX_CH
MUX
0
*
HPS_SHDN0, STBY_SHDN0, CHA_ON_SHDN0, and CHB_ON_SHDN0 are active when SHDN = 0.
**
HPS_SHDN1, STBY_SHDN1, CHA_ON_SHDN1, and CHB_ON_SHDN1 are active when SHDN = 1.
X = Don’t care.
Note: When HPS_SHDN_ = 1 (A+B adder mode), CHA_ON and CHB_ON must BOTH equal 0 for power-down or standby.
Bit 7, 6, 5
Set to 0 for proper operation
Bit 4
BIT_ORDER_B: Reverse CHB output bit order
0 = Defined data bus pin order (default)
1 = Reverse data bus pin order
Bit 3
BIT_ORDER_A: Reverse CHA output bit order
0 = Defined data bus pin order (default)
1 = Reverse data bus pin order
Bit 2
MUX_CH: Multiplexed data bus selection
0 = Multiplexed data output on CHA (CHA data presented first, followed by CHB data) (default)
1 = Multiplexed data output on CHB (CHB data presented first, followed by CHA data)
Bit 1
MUX: Digital output mode
0 = Dual data bus output mode (default)
1 = Single multiplexed data bus output mode
MUX_CH selects the output bus
Bit 0
Set to 0 for proper operation