5 mode register set cycle – Rainbow Electronics W9864G6GB User Manual

Page 23

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W9864G6GB

Publication Release Date: August 14, 2006

- 23 -

Revision A01

14.5 Mode Register Set Cycle

A0

A1

A2

A3

A4

A5

A6

Burst Length

Addressing Mode

CAS Latency

(Test Mode)

A8

Reserved

A0

A7

A0

A9

A0

Write Mode

A10

BS0

A0

A11

A0

BS1

"0"

"0"

A0

A3

A0

Addressing Mode

A0

0

A0

Sequential

A0

1

A0

Interleave

A0

A9

Single Write Mode

A0

0

A0

Burst read and Burst write

A0

1

A0

Burst read and single write

A0

A0

A2 A1 A0

A0

0 0 0

A0

0 0 1

A0

0 1 0

A0

0 1 1

A0

1 0 0

A0

1 0 1

A0

1 1 0

A0

1 1 1

A0

Burst Length

A0

Sequential

A0

Interleave

1

A0

1

A0

2

A0

2

A0

4

A0

4

A0

8

A0

8

A0

Reserved

A0

Reserved

A0

Full Page

A0

CAS Latency

A0

Reserved

A0

Reserved

2

A0

3

Reserved

A0

A6 A5 A4

A0

0 0 0

A0

0 1 0

A0

0 1 1

A0

1 0 0

A0

0 0 1

t

RSC

t

CMS

t

CMH

t

CMS

t

CMH

t

CMS

t

CMH

t

CMS

t

CMH

t

AS

t

AH

CLK

CS

RAS

CAS

WE

A0-A10

BS0,1

Register

set data

next

command

A0

Reserved

"0"

"0"

"0"

"0"

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