Functional logic diagram description, Compiler mode selection, Atf16v8c – Rainbow Electronics ATF16V8C User Manual

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ATF16V8C

Functional Logic Diagram Description

The Logic Option and Functional Diagrams describe the
ATF16V8C architecture. Eight configurable macrocells can
be configured as a registered output, combinatorial I/O,
combinatorial output, or dedicated input.

The ATF16V8C can be configured in one of three different
modes. Each mode makes the ATF16V8C look like a differ-
ent device. Most PLD compilers can choose the right mode
automatically. The user can also force the selection by sup-
plying the compiler with a mode selection. The determining
factors would be the usage of register versus combinatorial
outputs and dedicated outputs versus outputs with output
enable control.

The ATF16V8C universal architecture can be programmed
to emulate many 20-pin PAL devices. These architectural

subsets can be found in each of the configuration modes
described in the following pages. The user can download
the listed subset device JEDEC programming file to the
PLD programmer, and the ATF16V8C can be configured to
act like the chosen device. Check with your programmer
manufacturer for this capability.

Unused product terms are automatically disabled by the
compiler to decrease power consumption. A Security Fuse,
when programmed, protects the content of the ATF16V8C.
Eight bytes (64 fuses) of User Signature are accessible to
the user for purposes such as storing project name, part
number, revision, or date. The User Signature is accessible
regardless of the state of the Security Fuse.

Notes:

1. Please call Atmel PLD Hotline at (408) 436-4333 for more information.
2. Only applicable for version 3.4 or lower.

Compiler Mode Selection

Registered

Complex

Simple

Auto Select

ABEL, Atmel-ABEL

P16V8R

P16V8C

P16V8AS

P16V8