Rainbow Electronics DS26502 User Manual

General description, Applications, Ordering information

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REV: 070904

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here:

www.maxim-ic.com/errata

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GENERAL DESCRIPTION

The DS26502 is a building-integrated timing-
supply (BITS) clock-recovery element. The
receiver portion can recover a clock from T1,
E1, 64kHz composite clock, and 6312kHz
synchronization timing interfaces. In T1 and E1
modes, the Synchronization Status Message
(SSM) can also be recovered. The transmit
portion can directly interface to T1, E1, or
64kHz composite clock synchronization
interfaces as well as source the SSM in T1 and
E1 modes. The DS26502 can translate between
any of the supported inbound synchronization
clock rates to any supported outbound rate. A
separate output is provided to source a 6312kHz
clock. The device is controlled through a
parallel, serial, or hardware controller port.

APPLICATIONS

BITS Timing
Rate Conversion


ORDERING INFORMATION

PART TEMP

RANGE

PIN-PACKAGE

DS26502L

0°C to +70°C

64 LQFP

DS26502LN -40°C to +85°C 64 LQFP

FEATURES

§

G.703 2048kHz Synchronization Interface
Compliant

§

G.703 64kHz Centralized (Option A) and
Codirectional Timing Interface Compliant

§

G.703 Appendix II 64kHz and 6312kHz
Japanese Synchronization Interface
Compliant

§

Interfaces to Standard T1/J1 (1.544MHz) and
E1 (2.048MHz)

§

Interface to CMI-Coded T1/J1 and E1

§

Short- and Long-Haul Line Interface

§

Transmit and Receive T1 and E1 SSM
Messages with Message Validation

§

Crystal-Less Jitter Attenuator with Bypass
Mode

§

Fully Independent Transmit and Receive
Functionality

§

Internal Software-Selectable Receive- and
Transmit-Side Termination for
75Ω/100Ω/110Ω/120Ω T1, E1, and
Composite Clock Interfaces

§

Monitor Mode for Bridging Applications

§

Accepts 16.384MHz, 8.192MHz, 4.096MHz,
or 2.048MHz Master Clock

§

64kHz, 8kHZ, and 400Hz Outputs in
Composite Clock Mode

§

8-Bit Parallel Control Port, Multiplexed or
Nonmultiplexed, Intel or Motorola

§

Serial (SPI) Control Port

§

Hardware Control Mode

§

Provides LOS, AIS, and LOF Indications
Through Hardware Output Pins

§

Fast Transmitter-Output Disable Through
Device Pin for Protection Switching

§

IEEE 1149.1 JTAG Boundary Scan

§

3.3V Supply with 5V-Tolerant Inputs and
Outputs

DS26502

T1/E1/J1/64KCC BITS Element

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